From: Rob Clark <robdclark@gmail.com>
Date: Mon, 16 Jan 2017 19:02:54 +0000 (-0500)
Subject: freedreno/a5xx: fix psize
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6cc93bedc15d09395ab6a92a0a129d06a8cd8ae8;p=mesa.git

freedreno/a5xx: fix psize

Note spritelist (POINTLIST_PSIZE) seems not to be a thing anymore on
a5xx.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
---

diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_draw.c b/src/gallium/drivers/freedreno/a5xx/fd5_draw.c
index 7a2fafcf913..d9fce2f7ee8 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_draw.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_draw.c
@@ -60,12 +60,6 @@ draw_impl(struct fd_context *ctx, struct fd_ringbuffer *ring,
 	OUT_RING(ring, info->primitive_restart ? /* PC_RESTART_INDEX */
 			info->restart_index : 0xffffffff);
 
-	/* points + psize -> spritelist: */
-	if (ctx->rasterizer->point_size_per_vertex &&
-			fd5_emit_get_vp(emit)->writes_psize &&
-			(info->mode == PIPE_PRIM_POINTS))
-		primtype = DI_PT_POINTLIST_PSIZE;
-
 	fd5_emit_render_cntl(ctx, false);
 	fd5_draw_emit(ctx->batch, ring, primtype,
 			emit->key.binning_pass ? IGNORE_VISIBILITY : USE_VISIBILITY,
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_program.c b/src/gallium/drivers/freedreno/a5xx/fd5_program.c
index ee2cd4838b5..d297131c3fc 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_program.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_program.c
@@ -336,6 +336,7 @@ fd5_program_emit(struct fd_ringbuffer *ring, struct fd5_emit *emit)
 	uint32_t pos_regid, psize_regid, color_regid[8];
 	uint32_t face_regid, coord_regid, zwcoord_regid;
 	uint32_t vcoord_regid, vertex_regid, instance_regid;
+	uint8_t psize_loc = ~0;
 	int i, j;
 
 	setup_stages(emit, s);
@@ -472,8 +473,10 @@ fd5_program_emit(struct fd_ringbuffer *ring, struct fd5_emit *emit)
 	if (pos_regid != regid(63,0))
 		ir3_link_add(&l, pos_regid, 0xf, l.max_loc);
 
-	if (psize_regid != regid(63,0))
+	if (psize_regid != regid(63,0)) {
+		psize_loc = l.max_loc;
 		ir3_link_add(&l, psize_regid, 0x1, l.max_loc);
+	}
 
 	if ((s[VS].v->shader->stream_output.num_outputs > 0) &&
 			!emit->key.binning_pass) {
@@ -692,7 +695,7 @@ fd5_program_emit(struct fd_ringbuffer *ring, struct fd5_emit *emit)
 
 		OUT_PKT4(ring, REG_A5XX_VPC_PACK, 1);
 		OUT_RING(ring, A5XX_VPC_PACK_NUMNONPOSVAR(s[FS].v->total_in) |
-				(s[VS].v->writes_psize ? 0x0c00 : 0xff00)); // XXX
+				A5XX_VPC_PACK_PSIZELOC(psize_loc));
 
 		OUT_PKT4(ring, REG_A5XX_VPC_VARYING_INTERP_MODE(0), 8);
 		for (i = 0; i < 8; i++)