From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 22 Jul 2020 19:45:19 +0000 (+0100)
Subject: add boot-helper.S etc from microwatt litex core
X-Git-Tag: semi_working_ecp5~612
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6d059f5b56d03ecc570a4a3838eb846caa7109a3;p=soc.git

add boot-helper.S etc from microwatt litex core
---

diff --git a/src/soc/litex/boot-helper.S b/src/soc/litex/boot-helper.S
new file mode 100644
index 00000000..8dc226df
--- /dev/null
+++ b/src/soc/litex/boot-helper.S
@@ -0,0 +1,4 @@
+.section    .text, "ax", @progbits
+.global     boot_helper
+boot_helper:
+	nop # FIXME
diff --git a/src/soc/litex/crt0.S b/src/soc/litex/crt0.S
new file mode 100644
index 00000000..e03ac0bb
--- /dev/null
+++ b/src/soc/litex/crt0.S
@@ -0,0 +1,93 @@
+/* Copyright 2013-2014 IBM Corp.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * 	http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+ * implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#define FIXUP_ENDIAN						   \
+	tdi   0,0,0x48;	  /* Reverse endian of b . + 8		*/ \
+	b     191f;	  /* Skip trampoline if endian is good	*/ \
+	.long 0xa600607d; /* mfmsr r11				*/ \
+	.long 0x01006b69; /* xori r11,r11,1			*/ \
+	.long 0x05009f42; /* bcl 20,31,$+4			*/ \
+	.long 0xa602487d; /* mflr r10				*/ \
+	.long 0x14004a39; /* addi r10,r10,20			*/ \
+	.long 0xa64b5a7d; /* mthsrr0 r10			*/ \
+	.long 0xa64b7b7d; /* mthsrr1 r11			*/ \
+	.long 0x2402004c; /* hrfid				*/ \
+191:
+
+
+/* Load an immediate 64-bit value into a register */
+#define LOAD_IMM64(r, e)			\
+	lis     r,(e)@highest;			\
+	ori     r,r,(e)@higher;			\
+	rldicr  r,r, 32, 31;			\
+	oris    r,r, (e)@h;			\
+	ori     r,r, (e)@l;
+
+	. = 0
+.global _start
+_start:
+	FIXUP_ENDIAN
+
+	/* setup stack */
+	LOAD_IMM64(%r1, _fstack - 0x100)
+	LOAD_IMM64(%r12, main)
+	mtctr	%r12,
+	bctrl
+	b .
+
+#define EXCEPTION(nr)		\
+	.=  nr;      \
+	b	.
+
+	/* More exception stubs */
+	EXCEPTION(0x100)
+	EXCEPTION(0x200)
+	EXCEPTION(0x300)
+	EXCEPTION(0x380)
+	EXCEPTION(0x400)
+	EXCEPTION(0x480)
+	EXCEPTION(0x500)
+	EXCEPTION(0x600)
+	EXCEPTION(0x700)
+	EXCEPTION(0x800)
+	EXCEPTION(0x900)
+	EXCEPTION(0x980)
+	EXCEPTION(0xa00)
+	EXCEPTION(0xb00)
+	EXCEPTION(0xc00)
+	EXCEPTION(0xd00)
+	EXCEPTION(0xe00)
+	EXCEPTION(0xe20)
+	EXCEPTION(0xe40)
+	EXCEPTION(0xe60)
+	EXCEPTION(0xe80)
+	EXCEPTION(0xf00)
+	EXCEPTION(0xf20)
+	EXCEPTION(0xf40)
+	EXCEPTION(0xf60)
+	EXCEPTION(0xf80)
+#if 0
+	EXCEPTION(0x1000)
+	EXCEPTION(0x1100)
+	EXCEPTION(0x1200)
+	EXCEPTION(0x1300)
+	EXCEPTION(0x1400)
+	EXCEPTION(0x1500)
+	EXCEPTION(0x1600)
+#endif
+
+	.text
+
diff --git a/src/soc/litex/irq.h b/src/soc/litex/irq.h
new file mode 100644
index 00000000..7374cf50
--- /dev/null
+++ b/src/soc/litex/irq.h
@@ -0,0 +1,4 @@
+#ifndef __IRQ_H
+#define __IRQ_H
+
+#endif /* __IRQ_H */
diff --git a/src/soc/litex/sim.py b/src/soc/litex/sim.py
index cfdc0f8b..9640c58a 100644
--- a/src/soc/litex/sim.py
+++ b/src/soc/litex/sim.py
@@ -63,7 +63,7 @@ class SoCSMP(SoCCore):
 
         # SoCCore --------------------------------------------------------
         SoCCore.__init__(self, platform, clk_freq=sys_clk_freq,
-            cpu_type                 = "None", # XXX use None for now libre_soc
+            cpu_type                 = "microwatt", # XXX use None for now libre_soc
             cpu_variant              = cpu_variant,
             cpu_cls                  = LibreSOC,
             uart_name                = "sim",
diff --git a/src/soc/litex/system.h b/src/soc/litex/system.h
new file mode 100644
index 00000000..941dc564
--- /dev/null
+++ b/src/soc/litex/system.h
@@ -0,0 +1,18 @@
+#ifndef __SYSTEM_H
+#define __SYSTEM_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+__attribute__((unused)) static void flush_cpu_icache(void){}; /* FIXME: do something useful here! */
+__attribute__((unused)) static void flush_cpu_dcache(void){}; /* FIXME: do something useful here! */
+void flush_l2_cache(void);
+
+void busy_wait(unsigned int ms);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __SYSTEM_H */