From: Sandipan Das <sandipan@linux.vnet.ibm.com>
Date: Thu, 7 Jun 2018 05:30:35 +0000 (+0530)
Subject: arch-power: Add fixed-point word arithmetic divide extended instructions
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6d15d193221ce53c8729622da19c27bff94eed35;p=gem5.git

arch-power: Add fixed-point word arithmetic divide extended instructions

This adds the following arithmetic instructions:
  * Divide Word Extended (divwe[o][.])
  * Divide Word Extended Unsigned (divweu[o][.])

Change-Id: I1b8321de569d1be466e9d84ca5047b0c4682a0e3
Signed-off-by: Sandipan Das <sandipan@linux.vnet.ibm.com>
---

diff --git a/src/arch/power/isa/decoder.isa b/src/arch/power/isa/decoder.isa
index 17be9d544..ff9f62a06 100644
--- a/src/arch/power/isa/decoder.isa
+++ b/src/arch/power/isa/decoder.isa
@@ -604,6 +604,44 @@ decode PO default Unknown::unknown() {
                     }
                 }},
                 true);
+
+                427: divwe({{
+                    int32_t src1 = Ra_sw;
+                    int32_t src2 = Rb_sw;
+                    int64_t res;
+                    if ((src1 != INT32_MIN || src2 != -1) && src2 != 0) {
+                        res = ((int64_t)src1 << 32) / src2;
+                        if (res == (int32_t)res) {
+                            Rt = (uint32_t)res;
+                        } else {
+                            Rt = 0;
+                            setOV = true;
+                        }
+                    } else {
+                        Rt = 0;
+                        setOV = true;
+                    }
+                }},
+                true);
+
+                395: divweu({{
+                    uint32_t src1 = Ra_ud;
+                    uint32_t src2 = Rb_ud;
+                    uint64_t res;
+                    if (src2 != 0) {
+                        res = ((uint64_t)src1 << 32) / src2;
+                        if (res <= UINT32_MAX) {
+                            Rt = (uint32_t)res;
+                        } else {
+                            Rt = 0;
+                            setOV = true;
+                        }
+                    } else {
+                        Rt = 0;
+                        setOV = true;
+                    }
+                }},
+                true);
             }
 
             default: decode XFX_XO {