From: lkcl <lkcl@web>
Date: Fri, 4 Jun 2021 01:29:57 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: DRAFT_SVP64_0_1~818
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6d5e6793d61945a6ae1048a5f99b4d495c0efd2b;p=libreriscv.git

---

diff --git a/openpower/sv/int_fp_mv.mdwn b/openpower/sv/int_fp_mv.mdwn
index 9d29c0710..cc1b69953 100644
--- a/openpower/sv/int_fp_mv.mdwn
+++ b/openpower/sv/int_fp_mv.mdwn
@@ -12,7 +12,10 @@ Libre-SOC will be compliant with the
 **Scalar Floating-Point Subset** (SFFS) i.e. is not implementing VMX/VSX,
 and with its focus on modern 3D GPU hybrid workloads represents an
 important new potential use-case for OpenPOWER.
-With VMX/VSX not available in the SFFS Compliancy Level, the
+
+The progressive development of the Scalar parts of the Power ISA assumed
+that VSX would be there to complement it. However With VMX/VSX 
+**not available** in the newly-introduced SFFS Compliancy Level, the
 existing non-VSX conversion/data-movement instructions require load/store
 instructions (slow and expensive) to transfer data between the FPRs and
 the GPRs.  Also, because SimpleV needs efficient scalar instructions in