From: lkcl <lkcl@web>
Date: Fri, 23 Apr 2021 10:41:18 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: DRAFT_SVP64_0_1~1025
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6d9ea2f66839a29b2b97d130eb8b1e3d58b4eb04;p=libreriscv.git

---

diff --git a/openpower.mdwn b/openpower.mdwn
index 99b5ec9e2..35a8b5f9b 100644
--- a/openpower.mdwn
+++ b/openpower.mdwn
@@ -57,6 +57,7 @@ Summary
 * Opcode 4 Signal Processing (SPE)
 * Opcode 4 Vectors or Opcode 60 VSX (600+ additional instructions)
 * Avoidable legacy opcodes
+* SIMD. it's awful.
 
 # SimpleV