From: Sandipan Das Date: Thu, 7 Jun 2018 09:15:03 +0000 (+0530) Subject: arch-power: Add fixed-point compare instructions X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6dbbe5b263414062028234d0dab576a5e7ce5fa3;p=gem5.git arch-power: Add fixed-point compare instructions This adds the following compare instructions: * Compare Ranged Byte (cmprb) * Compare Equal Byte (cmpeqb) Change-Id: I44765b3a9a8f0a3d81ecd6984efce3fd01ba4b24 Signed-off-by: Sandipan Das --- diff --git a/src/arch/power/isa/decoder.isa b/src/arch/power/isa/decoder.isa index 73b68bfd8..af83a3989 100644 --- a/src/arch/power/isa/decoder.isa +++ b/src/arch/power/isa/decoder.isa @@ -476,6 +476,28 @@ decode PO default Unknown::unknown() { cr = makeCRField((uint32_t)Ra, (uint32_t)Rb, xer.so); } }}); + + 192: cmprb({{ + uint32_t src1 = Ra_ub; + uint32_t src2 = Rb_uw; + uint8_t src2lo = src2 & 0xff; + uint8_t src2hi = (src2 >>= 8) & 0xff; + uint32_t res = (src2lo <= src1) & (src1 <= src2hi); + if (length) { + src2lo = (src2 >>= 8) & 0xff; + src2hi = (src2 >>= 8) & 0xff; + res = ((src2lo <= src1) & (src1 <= src2hi)) | res; + } + cr = res << 2; + }}); + + 224: cmpeqb({{ + const uint64_t m1 = 0x0101010101010101; + const uint64_t m2 = 0x8080808080808080; + uint64_t res = Rb ^ (Ra_ub * m1); + res = (res - m1) & ~res & m2; + cr = (res != 0) << 2; + }}); } // Integer logic instructions use source registers Rs and Rb, diff --git a/src/arch/power/isa/formats/integer.isa b/src/arch/power/isa/formats/integer.isa index e5e6d2db0..41fe64c04 100644 --- a/src/arch/power/isa/formats/integer.isa +++ b/src/arch/power/isa/formats/integer.isa @@ -67,7 +67,7 @@ def template IntRcOeConstructor {{ let {{ -readXERCode = 'Xer xer = XER;' +readXERCode = 'Xer xer M5_VAR_USED = XER;' setXERCode = 'XER = xer;'