From: Giacomo Travaglini <giacomo.travaglini@arm.com>
Date: Mon, 4 Jan 2021 13:48:48 +0000 (+0000)
Subject: system-arm: Enabled HDLcd by default in DTS
X-Git-Tag: develop-gem5-snapshot~219
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6dcc7951cfefde7572d49659efd4db7d6b716d9a;p=gem5.git

system-arm: Enabled HDLcd by default in DTS

This is fine as people using *_hdlcd.dtsi are willing to simulate
an HDLcd

JIRA: https://gem5.atlassian.net/browse/GEM5-866

Change-Id: Ifd5d6ecc81de920dbc29a05b07f30c13dcee3aa4
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38797
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
---

diff --git a/system/arm/dt/platforms/display.dtsi b/system/arm/dt/platforms/display.dtsi
index 16a029a46..64c41e6c0 100644
--- a/system/arm/dt/platforms/display.dtsi
+++ b/system/arm/dt/platforms/display.dtsi
@@ -55,8 +55,6 @@
 };
 
 &dp0 {
-	status = "ok";
-
 	port {
 		dp0_output: endpoint@0 {
 			remote-endpoint = <&dp0_virt_input>;
diff --git a/system/arm/dt/platforms/vexpress_gem5_v1_hdlcd.dtsi b/system/arm/dt/platforms/vexpress_gem5_v1_hdlcd.dtsi
index efca66db3..a11dcb668 100644
--- a/system/arm/dt/platforms/vexpress_gem5_v1_hdlcd.dtsi
+++ b/system/arm/dt/platforms/vexpress_gem5_v1_hdlcd.dtsi
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2015-2019 ARM Limited
+ * Copyright (c) 2015-2019, 2021 ARM Limited
  * All rights reserved
  *
  * Redistribution and use in source and binary forms, with or without
@@ -29,18 +29,13 @@
 /include/ "vexpress_gem5_v1_base.dtsi"
 
 / {
-	/* The display processor needs custom configuration to setup its
-         * output ports. Disable it by default in the platform until the
-         * DT bindings have stabilize.
-	 */
 	dp0: hdlcd@2b000000 {
 		compatible = "arm,hdlcd";
 		reg = <0x0 0x2b000000 0x0 0x1000>;
 		interrupts = <0 63 4>;
 		clocks = <&osc_pxl>;
 		clock-names = "pxlclk";
-
-		status = "disabled";
+		status = "ok";
 	};
 };
 
diff --git a/system/arm/dt/platforms/vexpress_gem5_v2_hdlcd.dtsi b/system/arm/dt/platforms/vexpress_gem5_v2_hdlcd.dtsi
index 677572758..3e8003a58 100644
--- a/system/arm/dt/platforms/vexpress_gem5_v2_hdlcd.dtsi
+++ b/system/arm/dt/platforms/vexpress_gem5_v2_hdlcd.dtsi
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2015-2019 ARM Limited
+ * Copyright (c) 2015-2019, 2021 ARM Limited
  * All rights reserved
  *
  * Redistribution and use in source and binary forms, with or without
@@ -29,17 +29,13 @@
 /include/ "vexpress_gem5_v2_base.dtsi"
 
 / {
-	/* The display processor needs custom configuration to setup its
-	 * output ports. Disable it by default in the platform until the
-	 * DT bindings have stabilize.
-	 */
 	dp0: hdlcd@2b000000 {
 		compatible = "arm,hdlcd";
 		reg = <0x0 0x2b000000 0x0 0x1000>;
 		interrupts = <0 63 4>;
 		clocks = <&osc_pxl>;
 		clock-names = "pxlclk";
-		status = "disabled";
+		status = "ok";
 	};
 };