From: H.J. Lu Date: Sat, 11 Feb 2006 17:00:59 +0000 (+0000) Subject: gas/testsuite/ X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6dd5059a0631912657dd4704abc88cab1a04927f;p=binutils-gdb.git gas/testsuite/ 2006-02-11 H.J. Lu * gas/i386/i386.exp: Add "x86-64-crx" and "x86-64-crx-suffix". * gas/i386/x86-64-crx-suffix.d: New file. * gas/i386/x86-64-crx.d: Likewise. * gas/i386/x86-64-crx.s: Likewise. opcodes/ 2006-02-11 H.J. Lu * i386-dis.c ('Z'): Add a new macro. (dis386_twobyte): Use "movZ" for control register moves. --- diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index a51a1f4c63f..193a0184fbf 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,11 @@ +2006-02-11 H.J. Lu + + * gas/i386/i386.exp: Add "x86-64-crx" and "x86-64-crx-suffix". + + * gas/i386/x86-64-crx-suffix.d: New file. + * gas/i386/x86-64-crx.d: Likewise. + * gas/i386/x86-64-crx.s: Likewise. + 2006-02-07 Nathan Sidwell * testsuite/gas/m68k/all.exp: Add arch-cpu-1 test. diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index 6638d4b6150..91a5e9b0791 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -132,6 +132,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t run_dump_test "x86-64-vmx" run_dump_test "immed64" run_dump_test "x86-64-prescott" + run_dump_test "x86-64-crx" + run_dump_test "x86-64-crx-suffix" if { ![istarget "*-*-aix*"] && ![istarget "*-*-beos*"] diff --git a/gas/testsuite/gas/i386/x86-64-crx-suffix.d b/gas/testsuite/gas/i386/x86-64-crx-suffix.d new file mode 100644 index 00000000000..1dc3584219e --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-crx-suffix.d @@ -0,0 +1,21 @@ +#objdump: -dwMsuffix +#name: x86-64 control register related opcodes (with suffixes) +#source: x86-64-crx.s + +.*: +file format elf64-x86-64 + +Disassembly of section .text: + +0+ <_start>: +[ ]*[0-9a-f]+: 44 0f 20 c0[ ]+movq[ ]+?%cr8,%rax +[ ]*[0-9a-f]+: 44 0f 20 c7[ ]+movq[ ]+?%cr8,%rdi +[ ]*[0-9a-f]+: 44 0f 22 c0[ ]+movq[ ]+?%rax,%cr8 +[ ]*[0-9a-f]+: 44 0f 22 c7[ ]+movq[ ]+?%rdi,%cr8 +[ ]*[0-9a-f]+: 44 0f 20 c0[ ]+movq[ ]+?%cr8,%rax +[ ]*[0-9a-f]+: 44 0f 20 c7[ ]+movq[ ]+?%cr8,%rdi +[ ]*[0-9a-f]+: 44 0f 22 c0[ ]+movq[ ]+?%rax,%cr8 +[ ]*[0-9a-f]+: 44 0f 22 c7[ ]+movq[ ]+?%rdi,%cr8 +[ ]*[0-9a-f]+: 44 0f 20 c0[ ]+movq[ ]+?%cr8,%rax +[ ]*[0-9a-f]+: 44 0f 20 c7[ ]+movq[ ]+?%cr8,%rdi +[ ]*[0-9a-f]+: 44 0f 22 c0[ ]+movq[ ]+?%rax,%cr8 +[ ]*[0-9a-f]+: 44 0f 22 c7[ ]+movq[ ]+?%rdi,%cr8 diff --git a/gas/testsuite/gas/i386/x86-64-crx.d b/gas/testsuite/gas/i386/x86-64-crx.d new file mode 100644 index 00000000000..8c1333f5369 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-crx.d @@ -0,0 +1,21 @@ +#objdump: -dw +#name: x86-64 control register related opcodes +#source: x86-64-crx.s + +.*: +file format elf64-x86-64 + +Disassembly of section .text: + +0+ <_start>: +[ ]*[0-9a-f]+: 44 0f 20 c0[ ]+movq?[ ]+?%cr8,%rax +[ ]*[0-9a-f]+: 44 0f 20 c7[ ]+movq?[ ]+?%cr8,%rdi +[ ]*[0-9a-f]+: 44 0f 22 c0[ ]+movq?[ ]+?%rax,%cr8 +[ ]*[0-9a-f]+: 44 0f 22 c7[ ]+movq?[ ]+?%rdi,%cr8 +[ ]*[0-9a-f]+: 44 0f 20 c0[ ]+movq?[ ]+?%cr8,%rax +[ ]*[0-9a-f]+: 44 0f 20 c7[ ]+movq?[ ]+?%cr8,%rdi +[ ]*[0-9a-f]+: 44 0f 22 c0[ ]+movq?[ ]+?%rax,%cr8 +[ ]*[0-9a-f]+: 44 0f 22 c7[ ]+movq?[ ]+?%rdi,%cr8 +[ ]*[0-9a-f]+: 44 0f 20 c0[ ]+movq?[ ]+?%cr8,%rax +[ ]*[0-9a-f]+: 44 0f 20 c7[ ]+movq?[ ]+?%cr8,%rdi +[ ]*[0-9a-f]+: 44 0f 22 c0[ ]+movq?[ ]+?%rax,%cr8 +[ ]*[0-9a-f]+: 44 0f 22 c7[ ]+movq?[ ]+?%rdi,%cr8 diff --git a/gas/testsuite/gas/i386/x86-64-crx.s b/gas/testsuite/gas/i386/x86-64-crx.s new file mode 100644 index 00000000000..bc288c3623b --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-crx.s @@ -0,0 +1,18 @@ +.text +_start: + movq %cr8, %rax + movq %cr8, %rdi + movq %rax, %cr8 + movq %rdi, %cr8 + +.att_syntax noprefix + movq cr8, rax + movq cr8, rdi + movq rax, cr8 + movq rdi, cr8 + +.intel_syntax noprefix + mov rax, cr8 + mov rdi, cr8 + mov cr8, rax + mov cr8, rdi diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 9de01b6c023..629ab5e9bf7 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2006-02-11 H.J. Lu + + * i386-dis.c ('Z'): Add a new macro. + (dis386_twobyte): Use "movZ" for control register moves. + 2006-02-10 Nick Clifton * iq2000-asm.c: Regenerate. diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 973682bde21..65cb43ce651 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -491,6 +491,7 @@ struct dis386 { 'W' => print 'b' or 'w' ("w" or "de" in intel mode) 'X' => print 's', 'd' depending on data16 prefix (for XMM) 'Y' => 'q' if instruction has an REX 64bit overwrite prefix + 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise Many of the above letters print nothing in Intel mode. See "putop" for the details. @@ -830,9 +831,9 @@ static const struct dis386 dis386_twobyte[] = { { "(bad)", XX, XX, XX }, { "(bad)", XX, XX, XX }, /* 20 */ - { "movL", Rm, Cm, XX }, + { "movZ", Rm, Cm, XX }, { "movL", Rm, Dm, XX }, - { "movL", Cm, Rm, XX }, + { "movZ", Cm, Rm, XX }, { "movL", Dm, Rm, XX }, { "movL", Rd, Td, XX }, { "(bad)", XX, XX, XX }, @@ -2856,6 +2857,15 @@ putop (const char *template, int sizeflag) break; *obufp++ = 'l'; break; + case 'Z': + if (intel_syntax) + break; + if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS)) + { + *obufp++ = 'q'; + break; + } + /* Fall through. */ case 'L': if (intel_syntax) break;