From: Sebastien Bourdeauducq Date: Sun, 1 Apr 2012 15:43:24 +0000 (+0200) Subject: bus/dfi: reset active low signals to 1 X-Git-Tag: 24jan2021_ls180~2099^2~956 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6e3b25ebb6512a9f03ad3bab1d3df0eabe0b132a;p=litex.git bus/dfi: reset active low signals to 1 --- diff --git a/migen/bus/dfi.py b/migen/bus/dfi.py index b6f407d5..f965ecdc 100644 --- a/migen/bus/dfi.py +++ b/migen/bus/dfi.py @@ -24,6 +24,11 @@ class Interface: def __init__(self, a, ba, d, nphases=1): self.pdesc = phase_description(a, ba, d) self.phases = [SimpleInterface(self.pdesc) for i in range(nphases)] + for p in self.phases: + p.cas_n.reset = Constant(1) + p.cs_n.reset = Constant(1) + p.ras_n.reset = Constant(1) + p.we_n.reset = Constant(1) # Returns pairs (DFI-mandated signal name, Migen signal object) def get_standard_names(self, m2s=True, s2m=True):