From: Luke Kenneth Casson Leighton Date: Fri, 2 Nov 2018 11:25:21 +0000 (+0000) Subject: obscure fmv bug where fp reg size was not defined X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6eb6ffdbeb142ab75667fb30e8d8ff4e33a3ef42;p=riscv-isa-sim.git obscure fmv bug where fp reg size was not defined --- diff --git a/id_regs.py b/id_regs.py index 7e9dda0..86d4db9 100644 --- a/id_regs.py +++ b/id_regs.py @@ -87,6 +87,10 @@ def find_registers(fname, insn, twin_predication, immed_offset, is_branch): flen = 64 elif "f32(" in f: flen = 32 + elif insn == 'fmv_x_w': + flen = 32 + elif insn == 'fmv_x_d': + flen = 64 for pattern in patterns: x = f.find(pattern) if x == -1: