From: Jeff Law <law@gcc.gnu.org>
Date: Fri, 9 May 1997 20:35:09 +0000 (-0600)
Subject: mn10300.md (udivmodhi4, divmodhi4): Remove expander, give corresponding pattern ... 
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6f54921d696748515d8875f6c58cb91118ccf9a1;p=gcc.git

mn10300.md (udivmodhi4, divmodhi4): Remove expander, give corresponding pattern [u]divmodhir4 name.

        * mn10300.md (udivmodhi4, divmodhi4): Remove expander, give
        corresponding pattern [u]divmodhir4 name.  Clear MDR register
        in the udivmodhi4 pattern itself.
        (clear_mdr): Delete pattern.

From-SVN: r14058
---

diff --git a/gcc/config/mn10300/mn10300.md b/gcc/config/mn10300/mn10300.md
index bcea2583dbb..fcafb1295f7 100644
--- a/gcc/config/mn10300/mn10300.md
+++ b/gcc/config/mn10300/mn10300.md
@@ -775,29 +775,20 @@
   "mul %2,%0"
   [(set_attr "cc" "set_zn")])
 
-(define_expand "udivmodsi4"
-  [(parallel [(set (match_operand:SI 0 "register_operand" "")
-		   (udiv:SI (match_operand:SI 1 "register_operand" "")
-			    (match_operand:SI 2 "register_operand" "")))
-	      (set (match_operand:SI 3 "register_operand" "")
-		   (umod:SI (match_dup 1) (match_dup 2)))])]
-  ""
-  "
-{
-  rtx reg = gen_reg_rtx (SImode);
-  emit_move_insn (reg, GEN_INT (0));
-  emit_insn (gen_clear_mdr (reg));
-}")
-
-(define_insn ""
+(define_insn "udivmodsi4"
   [(set (match_operand:SI 0 "general_operand" "=d")
 	(udiv:SI (match_operand:SI 1 "general_operand" "0")
 		 (match_operand:SI 2 "general_operand" "d")))
-   (set (match_operand:SI 3 "general_operand" "=d")
+   (set (match_operand:SI 3 "general_operand" "=&d")
 	(umod:SI (match_dup 1) (match_dup 2)))]
   ""
   "*
 {
+  if (zero_dreg)
+    output_asm_insn (\"mov %0,mdr\", &zero_dreg);
+  else
+    output_asm_insn (\"sub %3,%3\;mov %3,mdr\", operands);
+
   if (find_reg_note (insn, REG_UNUSED, operands[3]))
     return \"divu %2,%0\";
   else
@@ -805,16 +796,7 @@
 }"
   [(set_attr "cc" "set_zn")])
 
-(define_expand "divmodsi4"
-  [(parallel [(set (match_operand:SI 0 "register_operand" "")
-		   (div:SI (match_operand:SI 1 "register_operand" "")
-			    (match_operand:SI 2 "register_operand" "")))
-	      (set (match_operand:SI 3 "register_operand" "")
-		   (mod:SI (match_dup 1) (match_dup 2)))])]
-  ""
-  "")
-
-(define_insn ""
+(define_insn "divmodsi4"
   [(set (match_operand:SI 0 "general_operand" "=d")
 	(div:SI (match_operand:SI 1 "general_operand" "0")
 		 (match_operand:SI 2 "general_operand" "d")))
@@ -830,12 +812,6 @@
 }"
   [(set_attr "cc" "set_zn")])
 
-(define_insn "clear_mdr"
-  [(unspec_volatile [(const_int 2)] 0)
-   (use (match_operand:SI 0 "register_operand" "d"))]
-  ""
-  "mov %0,mdr"
-  [(set_attr "cc" "none")])
 
 ;; ----------------------------------------------------------------------
 ;; AND INSTRUCTIONS