From: lkcl <lkcl@web>
Date: Wed, 16 Dec 2020 01:16:15 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~1306^2~4
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6f645f4b687b405156387e5ac4727b929b3f8505;p=libreriscv.git

---

diff --git a/openpower/sv/svp_rewrite/svp64.mdwn b/openpower/sv/svp_rewrite/svp64.mdwn
index 12a825647..66345ff94 100644
--- a/openpower/sv/svp_rewrite/svp64.mdwn
+++ b/openpower/sv/svp_rewrite/svp64.mdwn
@@ -118,7 +118,7 @@ Those patterns (and more) may be applied to:
 * FP fclass, fsgn, fneg, fabs, fcvt, frecip, fsqrt etc.
 * Condition Register ops mfcr, mtcr and other similar
 
-This is a huge list that creates extremely powerful combinations, particularly given that one of the predicate options is (1<<r3)
+This is a huge list that creates extremely powerful combinations, particularly given that one of the predicate options is `(1<<r3)`
 
 # Register Naming