From: lkcl Date: Wed, 9 Aug 2023 21:05:09 +0000 (+0100) Subject: (no commit message) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6f6711fe1924eb38d673d63be4d82d8bed95e14e;p=libreriscv.git --- diff --git a/3d_gpu/architecture/inorder_model.mdwn b/3d_gpu/architecture/inorder_model.mdwn index b0679dc0c..7f25c35be 100644 --- a/3d_gpu/architecture/inorder_model.mdwn +++ b/3d_gpu/architecture/inorder_model.mdwn @@ -15,7 +15,7 @@ A Single-Issue In-Order control unit will allow every pipepline to be active, and raises the ideal maximum throughput to 1 instruction per clock cycle, bearing any register hazards. -This control unit has not been written in HDL yet (incorrect: the first version was written 18 months ago, and is in soc/), however there's currently a +This control unit has not been written in HDL yet (incorrect: the first version was written 18 months ago, and is in soc/ and there are options in the Makefile to enable it), however there's currently a task to develop the model for the simulator first. The model will be used to determine performance.