From: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Date: Wed, 8 Jul 2020 16:24:16 +0000 (+0200)
Subject: radv: implement missing VK_ACCESS_MEMORY_{READ,WRITE}_BIT
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6f734324a5e213febb79de13550a21588c31bc7f;p=mesa.git

radv: implement missing VK_ACCESS_MEMORY_{READ,WRITE}_BIT

From the Vulkan spec 1.2.146:
    "VK_ACCESS_MEMORY_READ_BIT specifies all read accesses. It is
     always valid in any access mask, and is treated as equivalent
     to setting all READ access flags that are valid where it is
     used."

    "VK_ACCESS_MEMORY_WRITE_BIT specifies all write accesses.
     It is always valid in any access mask, and is treated as
     equivalent to setting all WRITE access flags that are valid
     where it is used."

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3241
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5807>
---

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 5ff1f3121c2..df0191f28d6 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -2907,6 +2907,17 @@ radv_src_access_flush(struct radv_cmd_buffer *cmd_buffer,
 			              RADV_CMD_FLAG_FLUSH_AND_INV_DB |
 			              RADV_CMD_FLAG_INV_L2;
 
+			if (flush_CB_meta)
+				flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB_META;
+			if (flush_DB_meta)
+				flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_DB_META;
+			break;
+		case VK_ACCESS_MEMORY_WRITE_BIT:
+			flush_bits |= RADV_CMD_FLAG_INV_L2 |
+				      RADV_CMD_FLAG_WB_L2 |
+				      RADV_CMD_FLAG_FLUSH_AND_INV_CB |
+				      RADV_CMD_FLAG_FLUSH_AND_INV_DB;
+
 			if (flush_CB_meta)
 				flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB_META;
 			if (flush_DB_meta)
@@ -2994,6 +3005,19 @@ radv_dst_access_flush(struct radv_cmd_buffer *cmd_buffer,
 			if (flush_DB_meta)
 				flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_DB_META;
 			break;
+		case VK_ACCESS_MEMORY_READ_BIT:
+			flush_bits |= RADV_CMD_FLAG_INV_VCACHE |
+				      RADV_CMD_FLAG_INV_SCACHE |
+			              RADV_CMD_FLAG_INV_L2;
+			if (flush_CB)
+				flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB;
+			if (flush_CB_meta)
+				flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB_META;
+			if (flush_DB)
+				flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_DB;
+			if (flush_DB_meta)
+				flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_DB_META;
+			break;
 		default:
 			break;
 		}