From: Alexandre Oliva Date: Sat, 20 Feb 2021 17:07:48 +0000 (-0300) Subject: prepare EH machinery for reg renumbering X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6f867a703b8e1c07acc341fb89e118c5c4c08e1b;p=gcc.git prepare EH machinery for reg renumbering --- diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index c1c95cbf1b7..f8a02c8a850 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -839,6 +839,11 @@ enum data_align { align_abi, align_opt, align_both }; #define FIRST_PSEUDO_REGISTER 111 +/* The SVP64 registers are not call-saved, so the unwinder doesn't have to deal + with them. If this grows, System.OS_Interface.Alternate_Stack_Size in the + Ada runtime needs to grow as well. */ +#define DWARF_FRAME_REGISTERS 111 + /* Use standard DWARF numbering for DWARF debugging information. */ #define DBX_REGISTER_NUMBER(REGNO) rs6000_dbx_register_number ((REGNO), 0) diff --git a/libgcc/config/rs6000/aix-unwind.h b/libgcc/config/rs6000/aix-unwind.h index b8d82765e55..be63f00455a 100644 --- a/libgcc/config/rs6000/aix-unwind.h +++ b/libgcc/config/rs6000/aix-unwind.h @@ -28,6 +28,7 @@ #define R_CR2 70 #define R_XER 76 #define R_FIRST_ALTIVEC 77 +#define R_ALT_RET 99 #define R_VRSAVE 109 #define R_VSCR 110 @@ -202,7 +203,7 @@ ucontext_for (struct _Unwind_Context *context) #ifdef __LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__ #define RETURN_COLUMN __LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__ #else -#define RETURN_COLUMN ARG_POINTER_REGNUM +#define RETURN_COLUMN R_ALT_RET #endif #define REGISTER_CFA_OFFSET_FOR(FS,REGNO,ADDR,CFA)\ diff --git a/libgcc/config/rs6000/darwin-fallback.c b/libgcc/config/rs6000/darwin-fallback.c index aa484c02134..72a2470cce7 100644 --- a/libgcc/config/rs6000/darwin-fallback.c +++ b/libgcc/config/rs6000/darwin-fallback.c @@ -42,6 +42,7 @@ #define R_CR2 70 #define R_XER 76 #define R_VR0 77 +#define R_AR 99 #define R_VRSAVE 109 #define R_VSCR 110 #define R_SPEFSCR 112 @@ -446,11 +447,11 @@ handle_syscall (_Unwind_FrameState *fs, const reg_unit gprs[32], the space it's reserved from is the GCC register space, not the DWARF2 numbering. So any free element of the right size is an OK choice. Thus: */ - fs->retaddr_column = ARG_POINTER_REGNUM; + fs->retaddr_column = R_AR; /* FIXME: this should really be done using a DWARF2 location expression, not using a static variable. In fact, this entire file should be implemented in DWARF2 expressions. */ - set_offset (ARG_POINTER_REGNUM, &return_addr); + set_offset (R_AR, &return_addr); for (i = 0; i < 32; i++) set_offset (32 + i, float_vector_state->fpregs + i); diff --git a/libgcc/config/rs6000/linux-unwind.h b/libgcc/config/rs6000/linux-unwind.h index acdc948f85d..3454d09d262 100644 --- a/libgcc/config/rs6000/linux-unwind.h +++ b/libgcc/config/rs6000/linux-unwind.h @@ -22,13 +22,16 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see . */ +#define R_FR0 32 #define R_LR 65 #define R_CR2 70 #define R_CR3 71 #define R_CR4 72 #define R_VR0 77 +#define R_AR 99 #define R_VRSAVE 109 + #ifdef __powerpc64__ #if _CALL_ELF == 2 #define TOC_SAVE_SLOT 24 @@ -239,16 +242,16 @@ ppc_fallback_frame_state (struct _Unwind_Context *context, fs->regs.reg[R_LR].how = REG_SAVED_OFFSET; fs->regs.reg[R_LR].loc.offset = (long) ®s->link - new_cfa; - fs->regs.reg[ARG_POINTER_REGNUM].how = REG_SAVED_OFFSET; - fs->regs.reg[ARG_POINTER_REGNUM].loc.offset = (long) ®s->nip - new_cfa; - fs->retaddr_column = ARG_POINTER_REGNUM; + fs->regs.reg[R_AR].how = REG_SAVED_OFFSET; + fs->regs.reg[R_AR].loc.offset = (long) ®s->nip - new_cfa; + fs->retaddr_column = R_AR; fs->signal_frame = 1; /* If we have a FPU... */ for (i = 14; i < 32; i++) { - fs->regs.reg[i + 32].how = REG_SAVED_OFFSET; - fs->regs.reg[i + 32].loc.offset = (long) ®s->fpr[i] - new_cfa; + fs->regs.reg[i + R_FR0].how = REG_SAVED_OFFSET; + fs->regs.reg[i + R_FR0].loc.offset = (long) ®s->fpr[i] - new_cfa; } /* If we have a VMX unit... */