From: Luke Kenneth Casson Leighton Date: Thu, 24 Dec 2020 00:13:23 +0000 (+0000) Subject: updating sv_analys.py svp64 table X-Git-Tag: convert-csv-opcode-to-binary~993 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6fbc9b21dd9d379b01b2a1cd64b4e763bc3b5b62;p=libreriscv.git updating sv_analys.py svp64 table --- diff --git a/openpower/opcode_regs_deduped.mdwn b/openpower/opcode_regs_deduped.mdwn index 06d169ae8..8aa74e470 100644 --- a/openpower/opcode_regs_deduped.mdwn +++ b/openpower/opcode_regs_deduped.mdwn @@ -798,45 +798,45 @@ ori | 2P | EXTRA3 | d:RS | s:RA | | | RS | | NONE | RA | NONE | NONE | oris | 2P | EXTRA3 | d:RS | s:RA | | | RS | | NONE | RA | NONE | NONE | xori | 2P | EXTRA3 | d:RS | s:RA | | | RS | | NONE | RA | NONE | NONE | xoris | 2P | EXTRA3 | d:RS | s:RA | | | RS | | NONE | RA | NONE | NONE | -subfic | 2P | EXTRA3 | TODO | | | | RA | | NONE | RT | NONE | NONE | +subfic | 2P | EXTRA3 | d:RT | s:RA | | | RA | | NONE | RT | NONE | NONE | """]] ## 1R-1W-CRo (RM-2P-1S1D) [[!table data=""" insn | Ptype | Etype | 0 | 1 | 2 | 3 | -cntlzw | 2P | EXTRA3 | TODO | | | | RS | NONE | NONE | RA | NONE | CR0 | -cntlzd | 2P | EXTRA3 | TODO | | | | RS | NONE | NONE | RA | NONE | CR0 | -subfze | 2P | EXTRA3 | TODO | | | | RA | NONE | NONE | RT | NONE | CR0 | -addze | 2P | EXTRA3 | TODO | | | | RA | NONE | NONE | RT | NONE | CR0 | -cnttzw | 2P | EXTRA3 | TODO | | | | RS | NONE | NONE | RA | NONE | CR0 | -cnttzd | 2P | EXTRA3 | TODO | | | | RS | NONE | NONE | RA | NONE | CR0 | -subfzeo | 2P | EXTRA3 | TODO | | | | RA | NONE | NONE | RT | NONE | CR0 | -addzeo | 2P | EXTRA3 | TODO | | | | RA | NONE | NONE | RT | NONE | CR0 | -extsh | 2P | EXTRA3 | TODO | | | | RS | NONE | NONE | RA | NONE | CR0 | -extsb | 2P | EXTRA3 | TODO | | | | RS | NONE | NONE | RA | NONE | CR0 | -extsw | 2P | EXTRA3 | TODO | | | | RS | NONE | NONE | RA | NONE | CR0 | +cntlzw | 2P | EXTRA3 | d:RS,d:CR0 | s:RA | | | RS | NONE | NONE | RA | NONE | CR0 | +cntlzd | 2P | EXTRA3 | d:RS,d:CR0 | s:RA | | | RS | NONE | NONE | RA | NONE | CR0 | +subfze | 2P | EXTRA3 | d:RT,d:CR0 | s:RA | | | RA | NONE | NONE | RT | NONE | CR0 | +addze | 2P | EXTRA3 | d:RT,d:CR0 | s:RA | | | RA | NONE | NONE | RT | NONE | CR0 | +cnttzw | 2P | EXTRA3 | d:RS,d:CR0 | s:RA | | | RS | NONE | NONE | RA | NONE | CR0 | +cnttzd | 2P | EXTRA3 | d:RS,d:CR0 | s:RA | | | RS | NONE | NONE | RA | NONE | CR0 | +subfzeo | 2P | EXTRA3 | d:RT,d:CR0 | s:RA | | | RA | NONE | NONE | RT | NONE | CR0 | +addzeo | 2P | EXTRA3 | d:RT,d:CR0 | s:RA | | | RA | NONE | NONE | RT | NONE | CR0 | +extsh | 2P | EXTRA3 | d:RS,d:CR0 | s:RA | | | RS | NONE | NONE | RA | NONE | CR0 | +extsb | 2P | EXTRA3 | d:RS,d:CR0 | s:RA | | | RS | NONE | NONE | RA | NONE | CR0 | +extsw | 2P | EXTRA3 | d:RS,d:CR0 | s:RA | | | RS | NONE | NONE | RA | NONE | CR0 | """]] ## 1R-1W-CRo (RM-2P-1S1D) [[!table data=""" insn | Ptype | Etype | 0 | 1 | 2 | 3 | -addic. | 2P | EXTRA3 | TODO | | | | RA | | NONE | RT | NONE | CR0 | +addic. | 2P | EXTRA3 | d:RT,d:CR0 | s:RA | | | RA | | NONE | RT | NONE | CR0 | rlwinm | 2P | EXTRA3 | TODO | | | | NONE | | RS | RA | NONE | CR0 | -andi. | 2P | EXTRA3 | TODO | | | | RS | | NONE | RA | NONE | CR0 | -andis. | 2P | EXTRA3 | TODO | | | | RS | | NONE | RA | NONE | CR0 | -mulli | 2P | EXTRA3 | TODO | | | | RA | | NONE | RT | NONE | CR0 | +andi. | 2P | EXTRA3 | d:RS,d:CR0 | s:RA | | | RS | | NONE | RA | NONE | CR0 | +andis. | 2P | EXTRA3 | d:RS,d:CR0 | s:RA | | | RS | | NONE | RA | NONE | CR0 | +mulli | 2P | EXTRA3 | d:RT,d:CR0 | s:RA | | | RA | | NONE | RT | NONE | CR0 | rldicl | 2P | EXTRA3 | TODO | | | | NONE | | RS | RA | NONE | CR0 | rldicl | 2P | EXTRA3 | TODO | | | | NONE | | RS | RA | NONE | CR0 | rldicr | 2P | EXTRA3 | TODO | | | | NONE | | RS | RA | NONE | CR0 | rldicr | 2P | EXTRA3 | TODO | | | | NONE | | RS | RA | NONE | CR0 | rldic | 2P | EXTRA3 | TODO | | | | NONE | | RS | RA | NONE | CR0 | rldic | 2P | EXTRA3 | TODO | | | | NONE | | RS | RA | NONE | CR0 | -subfme | 2P | EXTRA3 | TODO | | | | RA | | NONE | RT | NONE | CR0 | -addme | 2P | EXTRA3 | TODO | | | | RA | | NONE | RT | NONE | CR0 | -subfmeo | 2P | EXTRA3 | TODO | | | | RA | | NONE | RT | NONE | CR0 | -addmeo | 2P | EXTRA3 | TODO | | | | RA | | NONE | RT | NONE | CR0 | +subfme | 2P | EXTRA3 | d:RT,d:CR0 | s:RA | | | RA | | NONE | RT | NONE | CR0 | +addme | 2P | EXTRA3 | d:RT,d:CR0 | s:RA | | | RA | | NONE | RT | NONE | CR0 | +subfmeo | 2P | EXTRA3 | d:RT,d:CR0 | s:RA | | | RA | | NONE | RT | NONE | CR0 | +addmeo | 2P | EXTRA3 | d:RT,d:CR0 | s:RA | | | RA | | NONE | RT | NONE | CR0 | srawi | 2P | EXTRA3 | TODO | | | | NONE | | RS | RA | NONE | CR0 | sradi | 2P | EXTRA3 | TODO | | | | NONE | | RS | RA | NONE | CR0 | sradi | 2P | EXTRA3 | TODO | | | | NONE | | RS | RA | NONE | CR0 | diff --git a/openpower/sv_analysis.py b/openpower/sv_analysis.py index 173bf28bd..7d203bc7b 100644 --- a/openpower/sv_analysis.py +++ b/openpower/sv_analysis.py @@ -329,6 +329,9 @@ def process_csvs(): rows.sort() for row in rows: + #for idx in range(len(row)): + # if row[idx] == 'NONE': + # row[idx] = '' # get the instruction insn_name = row[2] insn = insns[insn_name] @@ -343,11 +346,20 @@ def process_csvs(): res[k] = '' # temporary useful info + regs = [] for k in ['in1', 'in2', 'in3', 'out', 'CR in', 'CR out']: if insn[k].startswith('CONST'): res[k] = '' + regs.append('') else: res[k] = insn[k] + if insn[k] == 'RA_OR_ZERO': + regs.append('RA') + elif insn[k] != 'NONE': + regs.append(insn[k]) + else: + regs.append('') + # sigh now the fun begins. this isn't the sanest way to do it # but the patterns are pretty regular. @@ -409,14 +421,16 @@ def process_csvs(): elif insn_name.startswith('cmp'): # cmpi res['0'] = 'd:BF' # BF: Rdest1_EXTRA3 res['1'] = 's:RA' # RA: Rsrc1_EXTRA3 - elif (insn_name.startswith('neg') or # neg* - insn_name in ['addic', 'addi', 'addis', 'subfuc']): + elif regs == ['RA','','','RT','','']: res['0'] = 'd:RT' # RT: Rdest1_EXTRA3 res['1'] = 's:RA' # RA: Rsrc1_EXTRA3 - elif (insn_name.startswith('prty') or # prty* - insn_name.startswith('ori') or # ori* - insn_name.startswith('xori') or # xori* - insn_name.startswith('popcnt')): # popcnt* + elif regs == ['RA','','','RT','','CR0']: + res['0'] = 'd:RT,d:CR0' # RT,CR0: Rdest1_EXTRA3 + res['1'] = 's:RA' # RA: Rsrc1_EXTRA3 + elif regs == ['RS','','','RA','','CR0']: + res['0'] = 'd:RS,d:CR0' # RS,CR0: Rdest1_EXTRA3 + res['1'] = 's:RA' # RA: Rsrc1_EXTRA3 + elif regs == ['RS','','','RA','','']: res['0'] = 'd:RS' # RS: Rdest1_EXTRA3 res['1'] = 's:RA' # RA: Rsrc1_EXTRA3 else: