From: Jozef Lawrynowicz Date: Thu, 5 Dec 2019 10:56:02 +0000 (+0000) Subject: MSP430: Fix postinc addressing mode being used for dst op of CMP insns X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=6ff8ab6a145219893901d9f5a9c8b11b948a36f3;p=gcc.git MSP430: Fix postinc addressing mode being used for dst op of CMP insns 2019-12-05 Jozef Lawrynowicz * config/msp430/msp430.md (cbranch4): Use msp430_general_dst_nonv_operand instead of nonimmediate_operand for dest operand of CMP instruction. (cbranchpsi4_real): Likewise. (cbranchqi4_real): Likewise. (cbranchhi4_real): Likewise. (cbranchpsi4_reversed): Likewise. (cbranchqi4_reversed): Likewise. (cbranchhi4_reversed): Likewise. From-SVN: r278994 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f17fc102a07..fca25729778 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,15 @@ +2019-12-05 Jozef Lawrynowicz + + * config/msp430/msp430.md (cbranch4): Use + msp430_general_dst_nonv_operand instead of nonimmediate_operand for + dest operand of CMP instruction. + (cbranchpsi4_real): Likewise. + (cbranchqi4_real): Likewise. + (cbranchhi4_real): Likewise. + (cbranchpsi4_reversed): Likewise. + (cbranchqi4_reversed): Likewise. + (cbranchhi4_reversed): Likewise. + 2019-12-05 Richard Biener PR tree-optimization/92803 diff --git a/gcc/config/msp430/msp430.md b/gcc/config/msp430/msp430.md index c3d85071a58..48515b9c26b 100644 --- a/gcc/config/msp430/msp430.md +++ b/gcc/config/msp430/msp430.md @@ -1247,7 +1247,7 @@ (define_expand "cbranch4" [(parallel [(set (pc) (if_then_else (match_operator 0 "" - [(match_operand:QHI 1 "nonimmediate_operand") + [(match_operand:QHI 1 "msp430_general_dst_nonv_operand") (match_operand:QHI 2 "general_operand")]) (label_ref (match_operand 3 "" "")) (pc))) @@ -1260,7 +1260,7 @@ (define_insn "cbranchpsi4_real" [(set (pc) (if_then_else (match_operator 0 "msp430_cmp_operator" - [(match_operand:PSI 1 "nonimmediate_operand" "r,rYs,rm") + [(match_operand:PSI 1 "msp430_general_dst_nonv_operand" "r,rYs,rm") (match_operand:PSI 2 "general_operand" "rLs,rYsi,rmi")]) (label_ref (match_operand 3 "" "")) (pc))) @@ -1276,7 +1276,7 @@ (define_insn "cbranchqi4_real" [(set (pc) (if_then_else (match_operator 0 "msp430_cmp_operator" - [(match_operand:QI 1 "nonimmediate_operand" "rYsYx,rm") + [(match_operand:QI 1 "msp430_general_dst_nonv_operand" "rYsYx,rm") (match_operand:QI 2 "general_operand" "rYsYxi,rmi")]) (label_ref (match_operand 3 "" "")) (pc))) @@ -1291,7 +1291,7 @@ (define_insn "cbranchhi4_real" [(set (pc) (if_then_else (match_operator 0 "msp430_cmp_operator" - [(match_operand:HI 1 "nonimmediate_operand" "rYsYx,rm") + [(match_operand:HI 1 "msp430_general_dst_nonv_operand" "rYsYx,rm") (match_operand:HI 2 "general_operand" "rYsYxi,rmi")]) (label_ref (match_operand 3 "" "")) (pc))) @@ -1330,7 +1330,7 @@ [(set (pc) (if_then_else (match_operator 0 "msp430_reversible_cmp_operator" [(match_operand:PSI 1 "general_operand" "rLs,rYsi,rmi") - (match_operand:PSI 2 "general_operand" "r,rYs,rm")]) + (match_operand:PSI 2 "msp430_general_dst_nonv_operand" "r,rYs,rm")]) (label_ref (match_operand 3 "" "")) (pc))) (clobber (reg:BI CARRY)) @@ -1346,7 +1346,7 @@ [(set (pc) (if_then_else (match_operator 0 "msp430_reversible_cmp_operator" [(match_operand:QI 1 "general_operand" "rYsYxi,rmi") - (match_operand:QI 2 "general_operand" "rYsYx,rm")]) + (match_operand:QI 2 "msp430_general_dst_nonv_operand" "rYsYx,rm")]) (label_ref (match_operand 3 "" "")) (pc))) (clobber (reg:BI CARRY)) @@ -1361,7 +1361,7 @@ [(set (pc) (if_then_else (match_operator 0 "msp430_reversible_cmp_operator" [(match_operand:HI 1 "general_operand" "rYsYxi,rmi") - (match_operand:HI 2 "general_operand" "rYsYx,rm")]) + (match_operand:HI 2 "msp430_general_dst_nonv_operand" "rYsYx,rm")]) (label_ref (match_operand 3 "" "")) (pc))) (clobber (reg:BI CARRY))