From: lkcl <lkcl@web>
Date: Sun, 23 Apr 2023 15:35:01 +0000 (+0100)
Subject: (no commit message)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=702f1dbc67f7e55eb96c8463674e2041956a16f0;p=libreriscv.git

---

diff --git a/openpower/sv/rfc/ls014.mdwn b/openpower/sv/rfc/ls014.mdwn
index 33334363f..a73593859 100644
--- a/openpower/sv/rfc/ls014.mdwn
+++ b/openpower/sv/rfc/ls014.mdwn
@@ -76,7 +76,8 @@ Desirable savings in general binary size are achieved.
 3. word halfword byte nibble 2-bit 1-bit reversal at multiple levels are all achieved
    with grevlut. Some of these instructions were explicitly added in Power ISA v3.1
    but grevlut is akin to xxeval.
-4. grevlut is expensive in hardware (estimated 20,000 gates)
+4. grevlut can be expensive in hardware (estimated 20,000 gates) but
+   like xxeval provides 512 equivalent instructions.
 
 **Changes**