From: Marek Olšák <marek.olsak@amd.com>
Date: Thu, 26 Jul 2018 00:21:04 +0000 (-0400)
Subject: radeonsi: update a comment about cache behavior
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7039d9299e11c69b14c7bb67ad0124ecde751f4a;p=mesa.git

radeonsi: update a comment about cache behavior
---

diff --git a/src/gallium/drivers/radeonsi/si_state_streamout.c b/src/gallium/drivers/radeonsi/si_state_streamout.c
index 8b0dfa5b116..fd7e843bc48 100644
--- a/src/gallium/drivers/radeonsi/si_state_streamout.c
+++ b/src/gallium/drivers/radeonsi/si_state_streamout.c
@@ -116,9 +116,9 @@ static void si_set_streamout_targets(struct pipe_context *ctx,
 		/* Invalidate the scalar cache in case a streamout buffer is
 		 * going to be used as a constant buffer.
 		 *
-		 * Invalidate TC L1, because streamout bypasses it (done by
-		 * setting GLC=1 in the store instruction), but it can contain
-		 * outdated data of streamout buffers.
+		 * Invalidate vL1, because streamout bypasses it (done by
+		 * setting GLC=1 in the store instruction), but vL1 in other
+		 * CUs can contain outdated data of streamout buffers.
 		 *
 		 * VS_PARTIAL_FLUSH is required if the buffers are going to be
 		 * used as an input immediately.