From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Mon, 16 Nov 2020 15:30:57 +0000 (+0000)
Subject: clarify immediate construction
X-Git-Tag: convert-csv-opcode-to-binary~1769
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=704fd5fa323aa4e5abf2b44e63dc65dcd55ae081;p=libreriscv.git

clarify immediate construction
---

diff --git a/openpower/sv/16_bit_compressed.mdwn b/openpower/sv/16_bit_compressed.mdwn
index 470f8e2dc..545a705d0 100644
--- a/openpower/sv/16_bit_compressed.mdwn
+++ b/openpower/sv/16_bit_compressed.mdwn
@@ -93,22 +93,26 @@ addi, mulli etc.)
 
 only available in 16-bit mode, and only available when M=1 and N=1
 
-    | 0 | 1  | 2 3 4 | | 567.8 | 9ab  | c d e | f |
-    | 1 | i2 |  RT   | | 010.0 | RB|0 | imm   | 1 | addi.
-    | 1 | i2 |  RT   | | 010.1 | RB|0 | imm   | 1 | naddi.
-    | 1 | i2         | | 011.0 | RB   | imm   | 1 | cmpdi
-    | 1 | i2         | | 011.1 | RB   | imm   | 1 | cmpwi
-    | 1 | i2         | | 100.0 | RT   | imm   | 1 | sti
-    | 1 | i2         | | 100.1 | RT   | imm   | 1 | fstwi
-    | 1 | i2         | | 101.0 | RA   | imm   | 1 | ldi
-    | 1 | i2         | | 101.1 | RA   | imm   | 1 | lwi
-    | 1 | i2         | | 110.0 | RA   | imm   | 1 | flwi
-    | 1 | i2         | | 110.1 | RA   | imm   | 1 | fldi
-
-* Note that bc is included (below)
-* immediate is constructed from imm (LSBs) and i2 (MSB)
-* "naddi." is "negative signed immediate" (maps to addis in 32-bit space,
-  range is -NNN to -1.  zero is excluded because it is covered by addi.)
+    | 0 | 1  | 2 3 4 | | 567.8  | 9ab  | c d e | f |
+    | 1 | i2 |  RT   | | 010.i3 | RB|0 | imm   | 1 | addi.
+    | 1 | i2         | | 011.0  | RB   | imm   | 1 | cmpdi
+    | 1 | i2         | | 011.1  | RB   | imm   | 1 | cmpwi
+    | 1 | i2         | | 100.0  | RT   | imm   | 1 | sti
+    | 1 | i2         | | 100.1  | RT   | imm   | 1 | fstwi
+    | 1 | i2         | | 101.0  | RA   | imm   | 1 | ldi
+    | 1 | i2         | | 101.1  | RA   | imm   | 1 | lwi
+    | 1 | i2         | | 110.0  | RA   | imm   | 1 | flwi
+    | 1 | i2         | | 110.1  | RA   | imm   | 1 | fldi
+
+Construction of immediate:
+
+* addi is EXTS(i3||i2||imm) to give a 5-bit range -32 to +31
+* all others are EXTS(i2||imm) to give a 7-bit range -128 to +127
+  (further for LD/ST due to word/dword-alignment)
+
+Further Notes:
+
+* bc also has an immediate mode, listed below in Branch section
 * for LD/ST, offset is aligned.  8-byte: i2||imm||0b000 4-byte: 0b00
 * SV Prefix over-rides help provide alternative bitwidths for LD/ST
 * RB|0 if RB is zero, addi. becomes "li" (this only works if RT takes