From: Alejandro PiƱeiro Date: Wed, 26 Aug 2020 23:07:20 +0000 (+0200) Subject: broadcom/qpu_instr: wait is not a read or write vpm instruction X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7059708dcdb7d594579b941edcd03d57762183d3;p=mesa.git broadcom/qpu_instr: wait is not a read or write vpm instruction For several schedule restrictions, we are checking if the instruction is using the vpm. So far it was implemented as being a read or a write of the vpm. But VPM wait (vpmwt) is not a read or a write (it is a wait until all pending writes finishes). This is relevant to implement peripheral accesses restrictions, as for some cases where vpm read|writes are allowed, vpmwt is not. Fixes: dEQP-VK.binding_model.descriptorset_random.sets8.constant.ubolimitlow.sbolimitlow.sampledimglow.outimgtexlow.noiub.nouab.vert.noia.0 On the sim, as it was raising an assert for wrong peripheral access. v2: simplify v3d_qpu_waits_vpm (Iago) Reviewed-by: Iago Toral Quiroga Part-of: --- diff --git a/src/broadcom/compiler/qpu_schedule.c b/src/broadcom/compiler/qpu_schedule.c index 9f11fe27eb8..9fe842c3e84 100644 --- a/src/broadcom/compiler/qpu_schedule.c +++ b/src/broadcom/compiler/qpu_schedule.c @@ -658,8 +658,8 @@ qpu_compatible_peripheral_access(const struct v3d_device_info *devinfo, /* V3D 4.1 and later allow TMU read along with a VPM read or write, and * WRTMUC with a TMU magic register write (other than tmuc). */ - if ((a->sig.ldtmu && v3d_qpu_uses_vpm(b)) || - (b->sig.ldtmu && v3d_qpu_uses_vpm(a))) { + if ((a->sig.ldtmu && v3d_qpu_reads_or_writes_vpm(b)) || + (b->sig.ldtmu && v3d_qpu_reads_or_writes_vpm(a))) { return true; } diff --git a/src/broadcom/qpu/qpu_instr.c b/src/broadcom/qpu/qpu_instr.c index 09d06b3fa3e..5c86daecdf7 100644 --- a/src/broadcom/qpu/qpu_instr.c +++ b/src/broadcom/qpu/qpu_instr.c @@ -591,7 +591,6 @@ v3d_qpu_add_op_reads_vpm(enum v3d_qpu_add_op op) { switch (op) { case V3D_QPU_A_VPMSETUP: - case V3D_QPU_A_VPMWT: case V3D_QPU_A_LDVPMV_IN: case V3D_QPU_A_LDVPMV_OUT: case V3D_QPU_A_LDVPMD_IN: @@ -610,7 +609,6 @@ v3d_qpu_add_op_writes_vpm(enum v3d_qpu_add_op op) { switch (op) { case V3D_QPU_A_VPMSETUP: - case V3D_QPU_A_VPMWT: case V3D_QPU_A_STVPMV: case V3D_QPU_A_STVPMD: case V3D_QPU_A_STVPMP: @@ -737,12 +735,27 @@ v3d_qpu_writes_vpm(const struct v3d_qpu_instr *inst) return false; } +static bool +v3d_qpu_waits_vpm(const struct v3d_qpu_instr *inst) +{ + return inst->type == V3D_QPU_INSTR_TYPE_ALU && + inst->alu.add.op == V3D_QPU_A_VPMWT; +} + bool -v3d_qpu_uses_vpm(const struct v3d_qpu_instr *inst) +v3d_qpu_reads_or_writes_vpm(const struct v3d_qpu_instr *inst) { return v3d_qpu_reads_vpm(inst) || v3d_qpu_writes_vpm(inst); } +bool +v3d_qpu_uses_vpm(const struct v3d_qpu_instr *inst) +{ + return v3d_qpu_reads_vpm(inst) || + v3d_qpu_writes_vpm(inst) || + v3d_qpu_waits_vpm(inst); +} + bool v3d_qpu_writes_r3(const struct v3d_device_info *devinfo, const struct v3d_qpu_instr *inst) diff --git a/src/broadcom/qpu/qpu_instr.h b/src/broadcom/qpu/qpu_instr.h index ad2d37b6051..76329c8864b 100644 --- a/src/broadcom/qpu/qpu_instr.h +++ b/src/broadcom/qpu/qpu_instr.h @@ -462,6 +462,7 @@ bool v3d_qpu_uses_mux(const struct v3d_qpu_instr *inst, enum v3d_qpu_mux mux); bool v3d_qpu_uses_vpm(const struct v3d_qpu_instr *inst) ATTRIBUTE_CONST; bool v3d_qpu_reads_vpm(const struct v3d_qpu_instr *inst) ATTRIBUTE_CONST; bool v3d_qpu_writes_vpm(const struct v3d_qpu_instr *inst) ATTRIBUTE_CONST; +bool v3d_qpu_reads_or_writes_vpm(const struct v3d_qpu_instr *inst) ATTRIBUTE_CONST; bool v3d_qpu_reads_flags(const struct v3d_qpu_instr *inst) ATTRIBUTE_CONST; bool v3d_qpu_writes_flags(const struct v3d_qpu_instr *inst) ATTRIBUTE_CONST; bool v3d_qpu_sig_writes_address(const struct v3d_device_info *devinfo,