From: Matthew Fortune Date: Mon, 16 May 2016 14:20:47 +0000 (+0000) Subject: Correct the latency of loads in M5100 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7065002128b529d194a358266546d5561060405a;p=gcc.git Correct the latency of loads in M5100 gcc/ * config/mips/m5100.md (m51_int_load): Update the latency to 2. From-SVN: r236288 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4ecd3e7919e..02f38cf536f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2016-05-16 Matthew Fortune + + * config/mips/m5100.md (m51_int_load): Update the latency to 2. + 2016-05-16 Nathan Sidwell * config/nvptx/nvptx.c (nvptx_mangle_decl_assembler_name): Revert. diff --git a/gcc/config/mips/m5100.md b/gcc/config/mips/m5100.md index f69fc7fc609..8d87b7087fc 100644 --- a/gcc/config/mips/m5100.md +++ b/gcc/config/mips/m5100.md @@ -65,7 +65,7 @@ ;; loads: lb, lbu, lh, lhu, ll, lw, lwl, lwr, lwpc, lwxs ;; prefetch: prefetch, prefetchx -(define_insn_reservation "m51_int_load" 3 +(define_insn_reservation "m51_int_load" 2 (and (eq_attr "cpu" "m5100") (eq_attr "type" "load,prefetch,prefetchx")) "m51_alu")