From: Mike Frysinger Date: Sun, 25 Dec 2022 05:28:55 +0000 (-0500) Subject: sim: mn10300: fix SMP compile X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=70b920ed097442a4b663fc0e64319382397ae46b;p=binutils-gdb.git sim: mn10300: fix SMP compile The igen tool sets up the SD define for code fragments to use, but mn10300 was expecting "sd". Change all the igen related code to use SD so it actually compiles. --- diff --git a/sim/mn10300/am33.igen b/sim/mn10300/am33.igen index 964f07521a8..da8f88fa599 100644 --- a/sim/mn10300/am33.igen +++ b/sim/mn10300/am33.igen @@ -256,8 +256,8 @@ usp += 4; } - if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33 - || STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33_2 + if (STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33 + || STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33_2 ) { if (mask & 0x1) @@ -307,8 +307,8 @@ PC = cia; mask = REGS; - if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33 - || STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33_2 + if (STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33 + || STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33_2 ) { if (mask & 0x4) diff --git a/sim/mn10300/mn10300-sim.h b/sim/mn10300/mn10300-sim.h index f6e4d854a14..3eadc0fe178 100644 --- a/sim/mn10300/mn10300-sim.h +++ b/sim/mn10300/mn10300-sim.h @@ -182,10 +182,10 @@ dw2u64 (dword data) /* Bring data in from the cold */ #define IMEM8(EA) \ -(sim_core_read_aligned_1(STATE_CPU(sd, 0), EA, exec_map, (EA))) +(sim_core_read_aligned_1(STATE_CPU (SD, 0), EA, exec_map, (EA))) #define IMEM8_IMMED(EA, N) \ -(sim_core_read_aligned_1(STATE_CPU(sd, 0), EA, exec_map, (EA) + (N))) +(sim_core_read_aligned_1(STATE_CPU (SD, 0), EA, exec_map, (EA) + (N))) /* Function declarations. */ diff --git a/sim/mn10300/mn10300.igen b/sim/mn10300/mn10300.igen index 6330d6f0090..42c0ead205d 100644 --- a/sim/mn10300/mn10300.igen +++ b/sim/mn10300/mn10300.igen @@ -4024,8 +4024,8 @@ sp += 4; } - if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33 - || STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33_2 + if (STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33 + || STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33_2 ) { if (mask & 0x1) @@ -4080,8 +4080,8 @@ PC = cia; mask = REGS; - if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33 - || STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33_2 + if (STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33 + || STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33_2 ) { if (mask & 0x4) @@ -4183,8 +4183,8 @@ mask = REGS; - if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33 - || STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33_2 + if (STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33 + || STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33_2 ) { if (mask & 0x4) @@ -4293,8 +4293,8 @@ mask = REGS; - if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33 - || STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33_2 + if (STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33 + || STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33_2 ) { if (mask & 0x4) @@ -4401,8 +4401,8 @@ offset = -4; mask = REGS; - if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33 - || STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33_2 + if (STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33 + || STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33_2 ) { @@ -4507,8 +4507,8 @@ offset = -4; mask = REGS; - if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33 - || STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33_2 + if (STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33 + || STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33_2 ) {