From: Michiel W. van Tol <Michiel.VanTol@arm.com>
Date: Thu, 4 Jun 2020 15:01:26 +0000 (+0100)
Subject: cpu-o3: Avoid passing ReExec 'faults' on CPU tracing interface
X-Git-Tag: v20.1.0.0~497
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=70c4b1c608b1f551a03744767fdc4fff849dffa9;p=gem5.git

cpu-o3: Avoid passing ReExec 'faults' on CPU tracing interface

The O3 model uses ReExec faults to flush the pipeline and restart
after a memory ordering violation, e.g. due to an incoming snoop.

These, just like branch mispredict flushes, are not architectural
faults but micro-architectural events, and should therefore not
show up on the instruction tracing interface.

This adds a check on faulting instructions in commit, to verify
if the instruction faulted due to ReExec, to avoid tracing it.

Change-Id: I1d3eaffb0ff22411e0e16a69ef07961924c88c10
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30554
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
---

diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh
index 4f467e96a..49b40e3f5 100644
--- a/src/cpu/o3/commit_impl.hh
+++ b/src/cpu/o3/commit_impl.hh
@@ -1259,7 +1259,11 @@ DefaultCommit<Impl>::commitHead(const DynInstPtr &head_inst, unsigned inst_num)
             "[tid:%i] [sn:%llu] Committing instruction with fault\n",
             tid, head_inst->seqNum);
         if (head_inst->traceData) {
-            if (DTRACE(ExecFaulting)) {
+            // We ignore ReExecution "faults" here as they are not real
+            // (architectural) faults but signal flush/replays.
+            if (DTRACE(ExecFaulting)
+                && dynamic_cast<ReExec*>(inst_fault.get()) == nullptr) {
+
                 head_inst->traceData->setFaulting(true);
                 head_inst->traceData->setFetchSeq(head_inst->seqNum);
                 head_inst->traceData->setCPSeq(thread[tid]->numOp);