From: Roland Pesch Date: Thu, 26 Nov 1992 02:28:17 +0000 (+0000) Subject: Doc for sac's new "z8ksim" Z8000 simulator target. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=712b9893ea1782351e0ca0ce829483ce0fb2d501;p=binutils-gdb.git Doc for sac's new "z8ksim" Z8000 simulator target. --- diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo index a460f7cfa76..28a05180966 100644 --- a/gdb/doc/gdb.texinfo +++ b/gdb/doc/gdb.texinfo @@ -110,6 +110,7 @@ _fi__(!_GENERIC__) @tex {\parskip=0pt \hfill pesch\@cygnus.com\par +\hfill (Send bugs and comments on _GDBN__ to bug-gdb\@prep.ai.mit.edu.) \hfill {\it Debugging with _GDBN__}, \manvers\par \hfill \TeX{}info \texinfoversion\par } diff --git a/gdb/doc/gdbinv-m.m4.in b/gdb/doc/gdbinv-m.m4.in index 95852b55565..edafe2ef714 100644 --- a/gdb/doc/gdbinv-m.m4.in +++ b/gdb/doc/gdbinv-m.m4.in @@ -20,4 +20,6 @@ _fi__(_ST2000__) _if__(_H8__) * Hitachi H8/300 Remote:: _GDBN__ and the Hitachi H8/300 _fi__(_H8__) - +_if__(_Z8000__) +* Z8000 Simulator:: _GDBN__ and its Zilog Z8000 Simulator +_fi__(_Z8000__) diff --git a/gdb/doc/gdbinv-s.m4.in b/gdb/doc/gdbinv-s.m4.in index 6a0953022b2..8130b673c79 100644 --- a/gdb/doc/gdbinv-s.m4.in +++ b/gdb/doc/gdbinv-s.m4.in @@ -944,3 +944,46 @@ to detect program completion. In either case, _GDBN__ will see the effect of a @sc{reset} on the H8/300 board as a ``normal exit'' of your program. _fi__(_H8__) + +_if__(_Z8000__) +@node Z8000 Simulator +@subsection _GDBN__ and its Zilog Z8000 Simulator + +@cindex simulator, Z8000 +@cindex Zilog Z8000 simulator +When configured for debugging Zilog Z8000 targets, _GDBN__ includes a Z8000 +simulator. + +@table @code +@item target z8ksim +@kindex z8ksim +This debugging target is a simulator for the Z8002, the unsegmented +variant of the Z8000 architecture. +@end table + +@noindent +After this point, you can debug Z8000 programs in the same style as +programs for your host computer; use the @code{file} command to load a +new program image, the @code{run} command to run your program, and so +on. + +As well as making available all the usual Z8000 registers (see +@code{info reg}), this debugging target provides three additional items +of information as specially named registers: + +@table @code +@item cycles +Counts clock-ticks in the simulator. + +@item insts +Counts instructions run in the simulator. + +@item time +Execution time in 60ths of a second. +@end table + +You can refer to these values in _GDBN__ expressions with the usual +conventions; for example, @w{@samp{b fputc if $cycles>5000}} sets a +conditional breakpoint that will suspend only after at least 5000 +simulated clock ticks. +_fi__(_Z8000__)