From: Sebastien Bourdeauducq Date: Fri, 29 Mar 2013 16:14:48 +0000 (+0100) Subject: m1crg: reset VGA clock generator X-Git-Tag: 24jan2021_ls180~2991 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7133d9abb0219ba8998d2ddf4233e10adefdb5fe;p=litex.git m1crg: reset VGA clock generator --- diff --git a/verilog/m1crg/m1crg.v b/verilog/m1crg/m1crg.v index 8d9bf31e..596b00d4 100644 --- a/verilog/m1crg/m1crg.v +++ b/verilog/m1crg/m1crg.v @@ -284,7 +284,7 @@ DCM_CLKGEN #( .PROGEN(vga_progen), .PROGDONE(vga_progdone), .LOCKED(vga_locked), - .RST(~pll_lckd) + .RST(~pll_lckd | sys_rst) ); ODDR2 #(