From: Tim Newsome <tim@sifive.com>
Date: Tue, 19 Jul 2016 01:32:45 +0000 (-0700)
Subject: Be verbose, since output is going to a log file.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=713f6a3089ac8b656d0a18874782e26d3039b22e;p=riscv-tests.git

Be verbose, since output is going to a log file.
---

diff --git a/debug/Makefile b/debug/Makefile
index a138f25..62d7875 100644
--- a/debug/Makefile
+++ b/debug/Makefile
@@ -3,10 +3,10 @@ RISCV_SIM ?= spike
 all:	spike32.log spike64.log
 
 spike32.log:
-	./gdbserver.py --isolate --spike32 --cmd $(RISCV_SIM) > $@ 2>&1
+	./gdbserver.py --isolate --spike32 --cmd $(RISCV_SIM) -- -v > $@ 2>&1
 
 spike64.log:
-	./gdbserver.py --isolate --spike --cmd $(RISCV_SIM) > $@ 2>&1
+	./gdbserver.py --isolate --spike --cmd $(RISCV_SIM) -- -v > $@ 2>&1
 
 clean:
 	rm -f *.log