From: lkcl <lkcl@web>
Date: Tue, 18 Apr 2023 10:17:22 +0000 (+0100)
Subject: (no commit message)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=713fbaaea490302fe0744139f07953c1e039b448;p=libreriscv.git

---

diff --git a/openpower/sv/rfc/ls012.mdwn b/openpower/sv/rfc/ls012.mdwn
index 8cdb7e78d..40974a978 100644
--- a/openpower/sv/rfc/ls012.mdwn
+++ b/openpower/sv/rfc/ls012.mdwn
@@ -252,6 +252,9 @@ applicable to pre-existing Scalar Power ISA multiply, divide, and shift
 operations at this late stage of maturity of the Power ISA is an entire
 area of research on its own deemed unlikely to be achievable.
 
+Note: none of these instructions are in VSX. They are a different paradigm
+and have more akin with their x86 equivalents.
+
 ## fclass and GPR-FPR moves
 
 [[sv/fclass]] - just one instruction.  With SFFS being locked down to