From: Michael Nolan <mtnolan2640@gmail.com>
Date: Mon, 4 May 2020 20:01:20 +0000 (-0400)
Subject: Extend clz to work with odd widths
X-Git-Tag: ls180-24jan2020~70
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7156581344e98812e2ede53924b4523ee6ade3d5;p=ieee754fpu.git

Extend clz to work with odd widths
---

diff --git a/src/ieee754/cordic/clz.py b/src/ieee754/cordic/clz.py
index 51239dc2..b8359152 100644
--- a/src/ieee754/cordic/clz.py
+++ b/src/ieee754/cordic/clz.py
@@ -10,21 +10,25 @@ class CLZ(Elaboratable):
 
     def generate_pairs(self, m):
         comb = m.d.comb
-        assert self.width % 2 == 0  # TODO handle odd widths
         pairs = []
         for i in range(0, self.width, 2):
-            pair = Signal(2, name="pair%d" % i)
-            comb += pair.eq(self.sig_in[i:i+2])
+            if i+1 >= self.width:
+                pair = Signal(1, name="cnt_1_%d" % (i/2))
+                comb += pair.eq(~self.sig_in[i])
+                pairs.append((pair, 1))
+            else:
+                pair = Signal(2, name="pair%d" % i)
+                comb += pair.eq(self.sig_in[i:i+2])
 
-            pair_cnt = Signal(2, name="cnt_1_%d" % (i/2))
-            with m.Switch(pair):
-                with m.Case(0):
-                    comb += pair_cnt.eq(2)
-                with m.Case(1):
-                    comb += pair_cnt.eq(1)
-                with m.Default():
-                    comb += pair_cnt.eq(0)
-            pairs.append((pair_cnt, 2))  # append pair, max_value
+                pair_cnt = Signal(2, name="cnt_1_%d" % (i/2))
+                with m.Switch(pair):
+                    with m.Case(0):
+                        comb += pair_cnt.eq(2)
+                    with m.Case(1):
+                        comb += pair_cnt.eq(1)
+                    with m.Default():
+                        comb += pair_cnt.eq(0)
+                pairs.append((pair_cnt, 2))  # append pair, max_value
         return pairs
 
     def combine_pairs(self, m, iteration, pairs):
diff --git a/src/ieee754/cordic/test/test_clz.py b/src/ieee754/cordic/test/test_clz.py
index c3051007..5d952417 100644
--- a/src/ieee754/cordic/test/test_clz.py
+++ b/src/ieee754/cordic/test/test_clz.py
@@ -39,7 +39,7 @@ class CLZTestCase(FHDLTestCase):
 
     def test_non_power_2(self):
         inputs = [0, 128, 512]
-        self.run_test(iter(inputs), width=10)
+        self.run_test(iter(inputs), width=11)
 
 
 if __name__ == "__main__":