From: lkcl <lkcl@web>
Date: Fri, 27 Apr 2018 04:14:16 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~5443
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=716481867aa40b3e5480822ec157a33c516e217e;p=libreriscv.git

---

diff --git a/harmonised_rvv_rvp.mdwn b/harmonised_rvv_rvp.mdwn
index fa431f1b8..955d43ba4 100644
--- a/harmonised_rvv_rvp.mdwn
+++ b/harmonised_rvv_rvp.mdwn
@@ -1,6 +1,6 @@
 # Proposal to harmonise RV Vector spec with Andes Packed SIMD ("Harmonised" RVP)
 
-[[Comparative analysis Harmonised RVP vs Andes Packed SIMD ISA proposal]]
+[[Comparative analysis|harmonised_rvv_rvp/comparative_analysis]] of Harmonised RVP vs Andes Packed SIMD ISA proposal
 
 ##### MVL, setvl instruction & VL CSR work as per RV Vector spec.