From: Jose Fonseca <jfonseca@vmware.com>
Date: Wed, 21 Oct 2015 16:19:41 +0000 (+0100)
Subject: gallivm: Translate all util_cpu_caps bits to LLVM attributes.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=718249843b915decf8fccec92e466ac1a6219934;p=mesa.git

gallivm: Translate all util_cpu_caps bits to LLVM attributes.

This should prevent disparity between features Mesa and LLVM
believe are supported by the CPU.

http://lists.freedesktop.org/archives/mesa-dev/2015-October/thread.html#96990

Tested on a i7-3720QM w/ LLVM 3.3 and 3.6.

v2: Increase SmallVector initial size as suggested by Gustaw Smolarczyk.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
CC: "10.6 11.0" <mesa-stable@lists.freedesktop.org>
---

diff --git a/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp b/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp
index 72fab8ccf06..e70a75fc663 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp
+++ b/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp
@@ -497,7 +497,33 @@ lp_build_create_jit_compiler_for_module(LLVMExecutionEngineRef *OutJIT,
 #endif
    }
 
-   llvm::SmallVector<std::string, 1> MAttrs;
+   llvm::SmallVector<std::string, 16> MAttrs;
+   if (util_cpu_caps.has_sse) {
+      MAttrs.push_back("+sse");
+   }
+   if (util_cpu_caps.has_sse2) {
+      MAttrs.push_back("+sse2");
+   }
+   if (util_cpu_caps.has_sse3) {
+      MAttrs.push_back("+sse3");
+   }
+   if (util_cpu_caps.has_ssse3) {
+      MAttrs.push_back("+ssse3");
+   }
+   if (util_cpu_caps.has_sse4_1) {
+#if HAVE_LLVM >= 0x0304
+      MAttrs.push_back("+sse4.1");
+#else
+      MAttrs.push_back("+sse41");
+#endif
+   }
+   if (util_cpu_caps.has_sse4_2) {
+#if HAVE_LLVM >= 0x0304
+      MAttrs.push_back("+sse4.2");
+#else
+      MAttrs.push_back("+sse42");
+#endif
+   }
    if (util_cpu_caps.has_avx) {
       /*
        * AVX feature is not automatically detected from CPUID by the X86 target
@@ -509,8 +535,14 @@ lp_build_create_jit_compiler_for_module(LLVMExecutionEngineRef *OutJIT,
       if (util_cpu_caps.has_f16c) {
          MAttrs.push_back("+f16c");
       }
-      builder.setMAttrs(MAttrs);
+      if (util_cpu_caps.has_avx2) {
+         MAttrs.push_back("+avx2");
+      }
+   }
+   if (util_cpu_caps.has_altivec) {
+      MAttrs.push_back("+altivec");
    }
+   builder.setMAttrs(MAttrs);
 
 #if HAVE_LLVM >= 0x0305
    StringRef MCPU = llvm::sys::getHostCPUName();