From: Richard Biener <rguenther@suse.de>
Date: Thu, 27 Jul 2017 13:44:51 +0000 (+0000)
Subject: re PR tree-optimization/81571 (ICE at -O3 in both 32-bit and 64-bit modes (internal... 
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=719488f819ceb7e7185bf324f04aa9030ba9c2ad;p=gcc.git

re PR tree-optimization/81571 (ICE at -O3 in both 32-bit and 64-bit modes (internal compiler error: in as_a, at is-a.h:192))

2017-07-27  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/81571
	* tree-vect-slp.c (vect_build_slp_tree): Properly verify reduction
	PHIs.

	* gcc.dg/torture/pr81571.c: New testcase.

From-SVN: r250626
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3beab6c5251..3ae2f46c8f2 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2017-07-27  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/81571
+	* tree-vect-slp.c (vect_build_slp_tree): Properly verify reduction
+	PHIs.
+
 2017-07-27  Eric Botcazou  <ebotcazou@adacore.com>
 
 	* config/sparc/sparc.c (sparc_option_override): Set MASK_FSMULD flag
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 292fa5b7885..e12654400b9 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2017-07-27  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/81571
+	* gcc.dg/torture/pr81571.c: New testcase.
+
 2017-07-27  Richard Biener  <rguenther@suse.de>
 
 	PR tree-optimization/81502
diff --git a/gcc/testsuite/gcc.dg/torture/pr81571.c b/gcc/testsuite/gcc.dg/torture/pr81571.c
new file mode 100644
index 00000000000..74bceb763ea
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr81571.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+
+int a, b, c, d;
+short fn1(int p1, int p2) { return p1; }
+
+int fn2(int p1) {}
+
+int main()
+{
+  for (; c; c++)
+    a |= fn1(1, a) | fn2(b |= d);
+  return 0;
+}
diff --git a/gcc/tree-vect-slp.c b/gcc/tree-vect-slp.c
index 7cfeeb98978..15d589d3452 100644
--- a/gcc/tree-vect-slp.c
+++ b/gcc/tree-vect-slp.c
@@ -947,11 +947,27 @@ vect_build_slp_tree (vec_info *vinfo,
      the recursion.  */
   if (gimple_code (stmt) == GIMPLE_PHI)
     {
+      vect_def_type def_type = STMT_VINFO_DEF_TYPE (vinfo_for_stmt (stmt));
       /* Induction from different IVs is not supported.  */
-      if (STMT_VINFO_DEF_TYPE (vinfo_for_stmt (stmt)) == vect_induction_def)
-	FOR_EACH_VEC_ELT (stmts, i, stmt)
-	  if (stmt != stmts[0])
-	    return NULL;
+      if (def_type == vect_induction_def)
+	{
+	  FOR_EACH_VEC_ELT (stmts, i, stmt)
+	    if (stmt != stmts[0])
+	      return NULL;
+	}
+      else
+	{
+	  /* Else def types have to match.  */
+	  FOR_EACH_VEC_ELT (stmts, i, stmt)
+	    {
+	      /* But for reduction chains only check on the first stmt.  */
+	      if (GROUP_FIRST_ELEMENT (vinfo_for_stmt (stmt))
+		  && GROUP_FIRST_ELEMENT (vinfo_for_stmt (stmt)) != stmt)
+		continue;
+	      if (STMT_VINFO_DEF_TYPE (vinfo_for_stmt (stmt)) != def_type)
+		return NULL;
+	    }
+	}
       node = vect_create_new_slp_node (stmts);
       return node;
     }