From: Chenghua Xu Date: Tue, 27 Mar 2018 11:43:43 +0000 (+0000) Subject: umips-stroe16-2.c: Change "length = 2" to "l=2" in dg-final. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7198b3c4fb685c4eb4e90259e0d01b8a6f15b2d3;p=gcc.git umips-stroe16-2.c: Change "length = 2" to "l=2" in dg-final. 2018-03-27 Chenghua Xu * gcc.target/mips/umips-stroe16-2.c: Change "length = 2" to "l=2" in dg-final. From-SVN: r258876 --- diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index b22d3bf8878..b6517f45310 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2018-03-27 Chenghua Xu + + * gcc.target/mips/umips-stroe16-2.c: Change "length = 2" + to "l=2" in dg-final. + 2018-03-27 Chenghua Xu * gcc.target/mips/fix-r4000-1.c: Delete "[^\n]+" in dg-final. diff --git a/gcc/testsuite/gcc.target/mips/umips-store16-2.c b/gcc/testsuite/gcc.target/mips/umips-store16-2.c index 0748edb5692..7fbd5e57305 100644 --- a/gcc/testsuite/gcc.target/mips/umips-store16-2.c +++ b/gcc/testsuite/gcc.target/mips/umips-store16-2.c @@ -17,6 +17,6 @@ f3 (unsigned int *ptr) { *ptr = 0; } -/* { dg-final { scan-assembler "\tsb\t\\\$0,0\\(\\\$\[0-9\]+\\)\[^\n\]*length = 2" } } */ -/* { dg-final { scan-assembler "\tsh\t\\\$0,0\\(\\\$\[0-9\]+\\)\[^\n\]*length = 2" } } */ -/* { dg-final { scan-assembler "\tsw\t\\\$0,0\\(\\\$\[0-9\]+\\)\[^\n\]*length = 2" } } */ +/* { dg-final { scan-assembler "\tsb\t\\\$0,0\\(\\\$\[0-9\]+\\)\[^\n\]*l=2" } } */ +/* { dg-final { scan-assembler "\tsh\t\\\$0,0\\(\\\$\[0-9\]+\\)\[^\n\]*l=2" } } */ +/* { dg-final { scan-assembler "\tsw\t\\\$0,0\\(\\\$\[0-9\]+\\)\[^\n\]*l=2" } } */