From: Yunsup Lee <yunsup@cs.berkeley.edu>
Date: Sun, 10 Apr 2011 03:15:22 +0000 (-0700)
Subject: [sim] set SR_EV for uts
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7198e5091fa9d2606a993cae45f9c90e170f3103;p=riscv-isa-sim.git

[sim] set SR_EV for uts
---

diff --git a/riscv/processor.cc b/riscv/processor.cc
index 99da902..3185908 100644
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@@ -60,6 +60,7 @@ void processor_t::init(uint32_t _id, char* _mem, size_t _memsz)
   {
     uts[i] = new processor_t(sim, _mem, _memsz);
     uts[i]->set_sr(uts[i]->sr | SR_EF);
+    uts[i]->set_sr(uts[i]->sr | SR_EV);
     uts[i]->utidx = i;
   }
 }