From: Shawn Rosti Date: Sat, 15 Oct 2016 20:11:07 +0000 (-0500) Subject: arm: Fix for ARM's Streamline conversion script X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=71c982ff708cc3adc7c0eccf536fea34c20cc5f0;p=gem5.git arm: Fix for ARM's Streamline conversion script tracked down issue with ARM's version of gem5 using the "cluster" name. The public/github version of ARM Gem5 does not use the "cluster" naming mechanism. Signed-off-by: Dam Sunwoo Signed-off-by: Jason Lowe-Power --- diff --git a/util/streamline/atomic_stat_config.ini b/util/streamline/atomic_stat_config.ini index 1095345ed..d05564608 100644 --- a/util/streamline/atomic_stat_config.ini +++ b/util/streamline/atomic_stat_config.ini @@ -41,8 +41,8 @@ # E.g., # # commit_inst_count = -# system.cluster.cpu#.commit.committedInsts -# system.cluster.cpu#.commit.commitSquashedInsts +# system.cpu#.commit.committedInsts +# system.cpu#.commit.commitSquashedInsts # # will display the inst counts (committed/squashed) as a stacked line chart. # Charts will still be configurable in Streamline. @@ -51,40 +51,40 @@ # '#' will be automatically replaced with the correct CPU id. commit_inst_count = - system.cluster.cpu#.committedInsts + system.cpu#.committedInsts cycles = - system.cluster.cpu#.num_busy_cycles - system.cluster.cpu#.num_idle_cycles + system.cpu#.num_busy_cycles + system.cpu#.num_idle_cycles register_access = - system.cluster.cpu#.num_int_register_reads - system.cluster.cpu#.num_int_register_writes + system.cpu#.num_int_register_reads + system.cpu#.num_int_register_writes mem_refs = - system.cluster.cpu#.num_mem_refs + system.cpu#.num_mem_refs inst_breakdown = - system.cluster.cpu#.num_conditional_control_insts - system.cluster.cpu#.num_int_insts - system.cluster.cpu#.num_fp_insts - system.cluster.cpu#.num_load_insts - system.cluster.cpu#.num_store_insts + system.cpu#.num_conditional_control_insts + system.cpu#.num_int_insts + system.cpu#.num_fp_insts + system.cpu#.num_load_insts + system.cpu#.num_store_insts icache = - system.cluster.il1_cache#.overall_hits::total - system.cluster.il1_cache#.overall_misses::total + system.il1_cache#.overall_hits::total + system.il1_cache#.overall_misses::total dcache = - system.cluster.dl1_cache#.overall_hits::total - system.cluster.dl1_cache#.overall_misses::total + system.dl1_cache#.overall_hits::total + system.dl1_cache#.overall_misses::total [PER_L2_STATS] # '#' will be automatically replaced with the correct L2 id. l2_cache = - system.cluster.l2_cache#.overall_hits::total - system.cluster.l2_cache#.overall_misses::total + system.l2_cache#.overall_hits::total + system.l2_cache#.overall_misses::total [OTHER_STATS] # Anything that doesn't belong to CPU or L2 caches diff --git a/util/streamline/m5stats2streamline.py b/util/streamline/m5stats2streamline.py index 96b7432f2..c65649e79 100755 --- a/util/streamline/m5stats2streamline.py +++ b/util/streamline/m5stats2streamline.py @@ -142,18 +142,18 @@ def parseConfig(config_file): print "ERROR: config file '", config_file, "' not found" sys.exit(1) - if config.has_section("system.cluster.cpu"): + if config.has_section("system.cpu"): num_cpus = 1 else: num_cpus = 0 - while config.has_section("system.cluster.cpu" + str(num_cpus)): + while config.has_section("system.cpu" + str(num_cpus)): num_cpus += 1 - if config.has_section("system.cluster.l2_cache"): + if config.has_section("system.l2_cache"): num_l2 = 1 else: num_l2 = 0 - while config.has_section("system.cluster.l2_cache" + str(num_l2)): + while config.has_section("system.l2_cache" + str(num_l2)): num_l2 += 1 print "Num CPUs:", num_cpus diff --git a/util/streamline/o3_stat_config.ini b/util/streamline/o3_stat_config.ini index 914524e7d..64036b5dd 100644 --- a/util/streamline/o3_stat_config.ini +++ b/util/streamline/o3_stat_config.ini @@ -41,8 +41,8 @@ # E.g., # # commit_inst_count = -# system.cluster.cpu#.commit.committedInsts -# system.cluster.cpu#.commit.commitSquashedInsts +# system.cpu#.commit.committedInsts +# system.cpu#.commit.commitSquashedInsts # # will display the inst counts (committed/squashed) as a stacked line chart. # Charts will still be configurable in Streamline. @@ -51,57 +51,57 @@ # '#' will be automatically replaced with the correct CPU id. icache = - system.cluster.il1_cache#.overall_hits::total - system.cluster.il1_cache#.overall_misses::total + system.il1_cache#.overall_hits::total + system.il1_cache#.overall_misses::total dcache = - system.cluster.dl1_cache#.overall_hits::total - system.cluster.dl1_cache#.overall_misses::total + system.dl1_cache#.overall_hits::total + system.dl1_cache#.overall_misses::total commit_inst_count = - system.cluster.cpu#.commit.committedInsts - system.cluster.cpu#.commit.commitSquashedInsts + system.cpu#.commit.committedInsts + system.cpu#.commit.commitSquashedInsts cycles = - system.cluster.cpu#.numCycles - system.cluster.cpu#.idleCycles + system.cpu#.numCycles + system.cpu#.idleCycles branch_mispredict = - system.cluster.cpu#.commit.branchMispredicts + system.cpu#.commit.branchMispredicts itb = - system.cluster.cpu#.itb.hits - system.cluster.cpu#.itb.misses + system.cpu#.itb.hits + system.cpu#.itb.misses dtb = - system.cluster.cpu#.dtb.hits - system.cluster.cpu#.dtb.misses + system.cpu#.dtb.hits + system.cpu#.dtb.misses commit_inst_breakdown = - system.cluster.cpu#.commit.loads - system.cluster.cpu#.commit.membars - system.cluster.cpu#.commit.branches - system.cluster.cpu#.commit.fp_insts - system.cluster.cpu#.commit.int_insts + system.cpu#.commit.loads + system.cpu#.commit.membars + system.cpu#.commit.branches + system.cpu#.commit.fp_insts + system.cpu#.commit.int_insts int_regfile = - system.cluster.cpu#.int_regfile_reads - system.cluster.cpu#.int_regfile_writes + system.cpu#.int_regfile_reads + system.cpu#.int_regfile_writes misc_regfile = - system.cluster.cpu#.misc_regfile_reads - system.cluster.cpu#.misc_regfile_writes + system.cpu#.misc_regfile_reads + system.cpu#.misc_regfile_writes rename_full = - system.cluster.cpu#.rename.ROBFullEvents - system.cluster.cpu#.rename.IQFullEvents - system.cluster.cpu#.rename.LSQFullEvents + system.cpu#.rename.ROBFullEvents + system.cpu#.rename.IQFullEvents + system.cpu#.rename.LSQFullEvents [PER_L2_STATS] # '#' will be automatically replaced with the correct L2 id. l2_cache = - system.cluster.l2_cache#.overall_hits::total - system.cluster.l2_cache#.overall_misses::total + system.l2_cache#.overall_hits::total + system.l2_cache#.overall_misses::total [OTHER_STATS] # Anything that doesn't belong to CPU or L2 caches