From: Eddie Hung <eddie@fpgeh.com>
Date: Mon, 25 May 2020 17:53:49 +0000 (-0700)
Subject: blackbox: re-use existing Module::makeblackbox() method
X-Git-Tag: working-ls180~518^2
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=721283ac2a5724f72fd24a012c61e87e293f2b8a;p=yosys.git

blackbox: re-use existing Module::makeblackbox() method
---

diff --git a/passes/cmds/blackbox.cc b/passes/cmds/blackbox.cc
index 5c0405f15..b8297cd77 100644
--- a/passes/cmds/blackbox.cc
+++ b/passes/cmds/blackbox.cc
@@ -48,31 +48,7 @@ struct BlackboxPass : public Pass {
 
 		for (auto module : design->selected_whole_modules_warn())
 		{
-			pool<Cell*> remove_cells;
-			pool<Wire*> remove_wires;
-
-			for (auto cell : module->cells())
-				remove_cells.insert(cell);
-
-			for (auto wire : module->wires())
-				if (wire->port_id == 0)
-					remove_wires.insert(wire);
-
-			for (auto it = module->memories.begin(); it != module->memories.end(); ++it)
-				delete it->second;
-			module->memories.clear();
-
-			for (auto it = module->processes.begin(); it != module->processes.end(); ++it)
-				delete it->second;
-			module->processes.clear();
-
-			module->new_connections(std::vector<RTLIL::SigSig>());
-
-			for (auto cell : remove_cells)
-				module->remove(cell);
-
-			module->remove(remove_wires);
-
+			module->makeblackbox();
 			module->set_bool_attribute(ID::blackbox);
 		}
 	}