From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Fri, 9 Apr 2021 15:55:38 +0000 (+0000)
Subject: whitespace cleanup
X-Git-Tag: LS180_RC3~155
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=723ed6157a98a4ccf089b5a25d106b491ce84af4;p=soclayout.git

whitespace cleanup
---

diff --git a/experiments10_verilog/coriolis2/settings.py b/experiments10_verilog/coriolis2/settings.py
index ec538b8..22c9c85 100644
--- a/experiments10_verilog/coriolis2/settings.py
+++ b/experiments10_verilog/coriolis2/settings.py
@@ -36,7 +36,11 @@ with overlay.CfgCache(priority=Cfg.Parameter.Priority.UserFile) as cfg:
     af  = CRL.AllianceFramework.get()
     env = af.getEnvironment()
     env.setCLOCK( '^sys_clk|^ck|^tck' )
-    env.addSYSTEM_LIBRARY( library=cellsTop+'/niolib', mode=CRL.Environment.Prepend )
-    env.addSYSTEM_LIBRARY( library=cellsTop+'/nsxlib', mode=CRL.Environment.Prepend )
+    env.setPOWER( 'vdd' )
+    env.setGROUND( 'vss' )
+    env.addSYSTEM_LIBRARY( library=cellsTop+'/niolib',
+                           mode=CRL.Environment.Prepend )
+    env.addSYSTEM_LIBRARY( library=cellsTop+'/nsxlib',
+                           mode=CRL.Environment.Prepend )
 print( '  o  Successfully run "<>/coriolis2/settings.py".' )
 print( '     - CELLS_TOP = "{}"'.format(cellsTop) )
diff --git a/experiments9/tsmc_c018/doDesign.py b/experiments9/tsmc_c018/doDesign.py
index dbd4dde..b5e259e 100644
--- a/experiments9/tsmc_c018/doDesign.py
+++ b/experiments9/tsmc_c018/doDesign.py
@@ -13,8 +13,9 @@ from   helpers         import trace, l, u, n
 from   helpers.io      import ErrorMessage, WarningMessage
 from   helpers.overlay import UpdateSession
 import plugins
-from   Hurricane  import Breakpoint, DataBase, DbU, Transformation, Point, Box, \
-                         Cell, Instance
+from   Hurricane  import (Breakpoint, DataBase, DbU, Transformation,
+                          Point, Box,
+                          Cell, Instance)
 from   plugins.alpha.block.matrix         import RegisterMatrix
 from   plugins.alpha.macro.macro          import Macro
 from   plugins.alpha.block.iospecs        import IoSpecs
@@ -30,25 +31,20 @@ powerCount = 0
 
 
 def isiterable ( pyobj ):
-    if isinstance(pyobj,collections.Iterable): return True
+    if isinstance(pyobj, collections.Iterable): return True
     return False
 
 
 def doIoPowerCap ( flags ):
     global powerCount
     side = flags & IoPin.SIDE_MASK
+    ioPadPower = [ (side , None,  'iopower_%d' % powerCount, 'iovdd' )
+                 , (side , None, 'ioground_%d' % powerCount, 'iovss' )
+                 , (side , None,   'ground_%d' % powerCount,   'vss' )
+                 , (side , None,    'power_%d' % powerCount,   'vdd' )
+                 ]
     if flags & IoPin.A_BEGIN:
-        ioPadPower = [ (side , None,    'power_{}'.format(powerCount),   'vdd' )
-                     , (side , None,   'ground_{}'.format(powerCount),   'vss' )
-                     , (side , None, 'ioground_{}'.format(powerCount), 'iovss' )
-                     , (side , None,  'iopower_{}'.format(powerCount), 'iovdd' )
-                     ]
-    else:
-        ioPadPower = [ (side , None,  'iopower_{}'.format(powerCount), 'iovdd' )
-                     , (side , None, 'ioground_{}'.format(powerCount), 'iovss' )
-                     , (side , None,   'ground_{}'.format(powerCount),   'vss' )
-                     , (side , None,    'power_{}'.format(powerCount),   'vdd' )
-                     ]
+        ioPadPower.reverse()
     powerCount += 1
     return ioPadPower
 
@@ -57,7 +53,8 @@ def doIoPinVector ( ioSpec, bits ):
     v = []
     if not isiterable(bits): bits = range(bits)
     if not bits:
-        raise ErrorMessage( 1, [ 'doIoPinVector(): Argument "bits" is neither a width nor an iterable.'
+        raise ErrorMessage( 1, [ 'doIoPinVector(): Argument "bits" ' \
+                                 'is neither a width nor an iterable.'
                                , '(bits={})'.format(bits)
                                ] )
     if len(ioSpec) == 5:
@@ -100,7 +97,8 @@ def rgetInstance ( cell, path ):
     if isinstance(path,str):
         path = path.split( '.' )
     elif not isinstance(path,list):
-        raise ErrorMessage( 1, 'rgetInstance(): "path" argument is neither a string or a list ({})"' \
+        raise ErrorMessage( 1, 'rgetInstance(): "path" argument ' \
+                               'is neither a string or a list ({})"' \
                                .format(path) )
     instance = cell.getInstance( path[0] )
     if instance is None: