From: lkcl <lkcl@web>
Date: Tue, 19 Apr 2022 12:21:32 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~2705
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7255be07d7eeef0fd96d56759966479a4a282ad8;p=libreriscv.git

---

diff --git a/openpower/isa/svfixedarith.mdwn b/openpower/isa/svfixedarith.mdwn
index 1cb17ac42..9094f2f8f 100644
--- a/openpower/isa/svfixedarith.mdwn
+++ b/openpower/isa/svfixedarith.mdwn
@@ -34,6 +34,8 @@ Special Registers Altered:
 
 * maddx RT,RA,RB,RC
 
+Pseudo-code:
+
     <!-- SVP64: RC-as-source and RC-as-dest have separate EXTRA2 -->
     <!-- RT, RA have EXTRA2 marking. RB is always scalar (r0-31) -->
     prod[0:127] <- (RA) * (RB)