From: Clifford Wolf Date: Wed, 5 Dec 2018 17:16:35 +0000 (-0800) Subject: Merge pull request #718 from whitequark/gate2lut X-Git-Tag: yosys-0.9~395 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=728a251a95d3c43d7fc6e439d0d9fbe6dac1bbc6;p=yosys.git Merge pull request #718 from whitequark/gate2lut gate2lut: new techlib, for converting Yosys gates to FPGA LUTs --- 728a251a95d3c43d7fc6e439d0d9fbe6dac1bbc6