From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 22 May 2019 13:05:44 +0000 (+0100)
Subject: clean up names, also note that readable is true if no writes are pending
X-Git-Tag: div_pipeline~1987
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=729cbaf010d91abf506737f71fe720435a642e89;p=soc.git

clean up names, also note that readable is true if no writes are pending
and writable is true if no reads are pending
---

diff --git a/src/experiment/score6600.py b/src/experiment/score6600.py
index e3a56b7e..38d61c34 100644
--- a/src/experiment/score6600.py
+++ b/src/experiment/score6600.py
@@ -382,7 +382,7 @@ def scoreboard_sim(dut, alusim):
 
     yield dut.int_store_i.eq(0)
 
-    for i in range(100):
+    for i in range(500):
 
         # set random values in the registers
         for i in range(1, dut.n_regs):
@@ -392,7 +392,7 @@ def scoreboard_sim(dut, alusim):
         # create some instructions (some random, some regression tests)
         instrs = []
         if True:
-            for i in range(10):
+            for i in range(20):
                 src1 = randint(1, dut.n_regs-1)
                 src2 = randint(1, dut.n_regs-1)
                 while True:
diff --git a/src/scoreboard/fu_fu_matrix.py b/src/scoreboard/fu_fu_matrix.py
index d40f70fa..d8eaa858 100644
--- a/src/scoreboard/fu_fu_matrix.py
+++ b/src/scoreboard/fu_fu_matrix.py
@@ -61,8 +61,8 @@ class FUFUDepMatrix(Elaboratable):
             writable.append(fu.writable_o)
 
         # ... and output them from this module (horizontal, width=REGs)
-        m.d.comb += self.readable_o.eq(Cat(*writable))
-        m.d.comb += self.writable_o.eq(Cat(*readable))
+        m.d.comb += self.readable_o.eq(Cat(*readable))
+        m.d.comb += self.writable_o.eq(Cat(*writable))
 
         # ---
         # connect FU Pending
diff --git a/src/scoreboard/fu_picker_vec.py b/src/scoreboard/fu_picker_vec.py
index 7fe5d5a0..d38bbfae 100644
--- a/src/scoreboard/fu_picker_vec.py
+++ b/src/scoreboard/fu_picker_vec.py
@@ -15,7 +15,12 @@ class FU_Pick_Vec(Elaboratable):
 
     def elaborate(self, platform):
         m = Module()
-        m.d.comb += self.readable_o.eq(~self.rd_pend_i.bool())
-        m.d.comb += self.writable_o.eq(~self.wr_pend_i.bool())
+
+        # Readable if there are no writes pending
+        m.d.comb += self.readable_o.eq(~self.wr_pend_i.bool())
+
+        # Writable if there are no reads pending
+        m.d.comb += self.writable_o.eq(~self.rd_pend_i.bool())
+
         return m