From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Mon, 3 Jan 2022 22:09:56 +0000 (+0000)
Subject: add missing ext_irq signal to testissuer in microwatt compat mode
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=72f4dbcc231be82058bf13af4800fcb260867de5;p=soc.git

add missing ext_irq signal to testissuer in microwatt compat mode
---

diff --git a/src/soc/simple/issuer.py b/src/soc/simple/issuer.py
index 2fafc662..682e899d 100644
--- a/src/soc/simple/issuer.py
+++ b/src/soc/simple/issuer.py
@@ -653,6 +653,7 @@ class TestIssuerBase(Elaboratable):
     def external_ports(self):
         if self.microwatt_compat:
             ports = [self.core.o.core_terminate_o,
+                     self.ext_irq,
                      self.alt_reset, # not connected yet
                      ClockSignal(),
                      ResetSignal(),