From: lkcl <lkcl@web>
Date: Sat, 27 Feb 2021 15:29:45 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~113
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=733b7e8d66a88d612f4a7a9d909a89be7599d7da;p=libreriscv.git

---

diff --git a/openpower/sv/implementation.mdwn b/openpower/sv/implementation.mdwn
index eea188067..011a3e9fb 100644
--- a/openpower/sv/implementation.mdwn
+++ b/openpower/sv/implementation.mdwn
@@ -73,7 +73,7 @@ An autogenerator containing CSV files is available so that the task of creating
 * ISACaller: part done.  svp64 detected, PowerDecoder2 in use
 * power-gem5: TODO
 * TestIssuer: part done.  svp64 detected, PowerDecoder2 in use.
-* Microwatt: TODO
+* Microwatt: TODO, started auto-generated sv_decode.vhdl
 * python-based assembler-translator: 40% done (lkcl)
 * c++ macros: underway (jacob)