From: Luke Kenneth Casson Leighton Date: Mon, 25 May 2020 02:26:46 +0000 (+0100) Subject: comment out invalid test X-Git-Tag: div_pipeline~851 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=736228288b1065b50752d1193fb1d26037960bf6;p=soc.git comment out invalid test --- diff --git a/src/soc/experiment/compalu_multi.py b/src/soc/experiment/compalu_multi.py index 876f5f8a..c1a555d1 100644 --- a/src/soc/experiment/compalu_multi.py +++ b/src/soc/experiment/compalu_multi.py @@ -354,9 +354,11 @@ def scoreboard_sim(dut): result = yield from op_sim(dut, 5, 2, InternalOp.OP_ADD, inv_a=1) assert result == 65532 - result = yield from op_sim(dut, 5, 2, InternalOp.OP_ADD, zero_a=1, - imm=8, imm_ok=1) - assert result == 8 + # XXX - immediate and zero is not a POWER mode (and won't work anyway) + # reason: no actual operands. + #result = yield from op_sim(dut, 5, 2, InternalOp.OP_ADD, zero_a=1, + # imm=8, imm_ok=1) + #assert result == 8 result = yield from op_sim(dut, 5, 2, InternalOp.OP_ADD, zero_a=1) assert result == 2