From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Sat, 5 Sep 2015 13:47:56 +0000 (+0200)
Subject: mibuild/altera/common: use Altera instead of Quartus (coherency with xilinx/common)
X-Git-Tag: 24jan2021_ls180~2099^2~23
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7363f0086763793c85d684f4927798020415a531;p=litex.git

mibuild/altera/common: use Altera instead of Quartus (coherency with xilinx/common)
---

diff --git a/mibuild/altera/common.py b/mibuild/altera/common.py
index 56e20655..4dcad7ee 100644
--- a/mibuild/altera/common.py
+++ b/mibuild/altera/common.py
@@ -2,7 +2,7 @@ from migen.fhdl.std import Instance, Module
 from migen.genlib.io import DifferentialInput, DifferentialOutput
 
 
-class QuartusDifferentialInputImpl(Module):
+class AlteraDifferentialInputImpl(Module):
     def __init__(self, i_p, i_n, o):
         self.specials += Instance("ALT_INBUF_DIFF",
                                   name="ibuf_diff",
@@ -11,13 +11,13 @@ class QuartusDifferentialInputImpl(Module):
                                   o_o=o)
 
 
-class QuartusDifferentialInput:
+class AlteraDifferentialInput:
     @staticmethod
     def lower(dr):
-        return QuartusDifferentialInputImpl(dr.i_p, dr.i_n, dr.o)
+        return AlteraDifferentialInputImpl(dr.i_p, dr.i_n, dr.o)
 
 
-class QuartusDifferentialOutputImpl(Module):
+class AlteraDifferentialOutputImpl(Module):
     def __init__(self, i, o_p, o_n):
         self.specials += Instance("ALT_OUTBUF_DIFF",
                                   name="obuf_diff",
@@ -26,13 +26,13 @@ class QuartusDifferentialOutputImpl(Module):
                                   o_obar=o_n)
 
 
-class QuartusDifferentialOutput:
+class AlteraDifferentialOutput:
     @staticmethod
     def lower(dr):
-        return QuartusDifferentialOutputImpl(dr.i, dr.o_p, dr.o_n)
+        return AlteraDifferentialOutputImpl(dr.i, dr.o_p, dr.o_n)
 
 
 altera_special_overrides = {
-    DifferentialInput: QuartusDifferentialInput,
-    DifferentialOutput: QuartusDifferentialOutput
+    DifferentialInput: AlteraDifferentialInput,
+    DifferentialOutput: AlteraDifferentialOutput
 }