From: Luke Kenneth Casson Leighton Date: Sat, 15 May 2021 16:08:01 +0000 (+0100) Subject: whoops initialise FPRs from GPRs in ISACaller X-Git-Tag: 0.0.3~25 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7394762aa81d8d608bf88d07259260e026b2bf4a;p=openpower-isa.git whoops initialise FPRs from GPRs in ISACaller --- diff --git a/src/openpower/decoder/isa/caller.py b/src/openpower/decoder/isa/caller.py index eec3b08f..6baac55f 100644 --- a/src/openpower/decoder/isa/caller.py +++ b/src/openpower/decoder/isa/caller.py @@ -523,7 +523,7 @@ class ISACaller: initial_svstate = SVP64State(initial_svstate) self.svstate = initial_svstate self.gpr = GPR(decoder2, self, self.svstate, regfile) - self.fpr = GPR(decoder2, self, self.svstate, regfile) + self.fpr = GPR(decoder2, self, self.svstate, fpregfile) self.spr = SPR(decoder2, initial_sprs) # initialise SPRs before MMU self.mem = Mem(row_bytes=8, initial_mem=initial_mem) self.imem = Mem(row_bytes=4, initial_mem=initial_insns)