From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Tue, 26 Jul 2022 15:15:17 +0000 (+0100)
Subject: add some more example fmvis to work out which is LSB and which MSB
X-Git-Tag: sv_maxu_works-initial~219
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7394a77590bf71090471a1bea8721a6f47c93a69;p=openpower-isa.git

add some more example fmvis to work out which is LSB and which MSB
---

diff --git a/src/openpower/sv/trans/svp64.py b/src/openpower/sv/trans/svp64.py
index 86f00a8e..f2361333 100644
--- a/src/openpower/sv/trans/svp64.py
+++ b/src/openpower/sv/trans/svp64.py
@@ -1504,6 +1504,8 @@ if __name__ == '__main__':
         'sv.svstep./m=r3 2.v, 4, 0',
         'ternlogi 0,0,0,0x5',
         'fmvis 5,65535',
+        'fmvis 5,1',
+        'fmvis 5,32768',
     ]
     isa = SVP64Asm(lst, macros=macros)
     log("list", list(isa))