From: Luke Kenneth Casson Leighton Date: Fri, 13 Sep 2019 03:39:56 +0000 (+0100) Subject: Revert "" X-Git-Tag: convert-csv-opcode-to-binary~4074 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=73b9cfdf7fccdd398338535f4308f43526b83970;p=libreriscv.git Revert "" This reverts commit 63f305fcf6b062665b08f7b0828bf36d756de2f6. --- diff --git a/simple_v_extension/vblock_format_table.mdwn b/simple_v_extension/vblock_format_table.mdwn index f2ef1d9dd..68ee6646c 100644 --- a/simple_v_extension/vblock_format_table.mdwn +++ b/simple_v_extension/vblock_format_table.mdwn @@ -13,13 +13,13 @@ of the RISC-V ISA, is as follows: The VL/MAXVL/SubVL Block format, when 16xil != 0b111, is: -| 31:30 | 29:28 | 27:22 | 21 | 20:19 | 18:16 | comment | -| ----- | ----- | -------- | -- | ---- | --------- | ---------------------- | -| 0b00 | SubVL | imm[5:0] |rsvd| rd[4:0] || sv.setvl rd, x0, imm | -| 0b01 | SubVL | imm[5:0] | rs1[2:0] || rd[2:0] | RVC reg format, sv.setvl rd, rs, imm | -| 0b10 | SubVL | imm[5:0] |rsvd| rs1[4:0] || sv.setvl x0, rs1, imm | -| 0b11 | rsvd | rsvd |rsvd| rsvd || reserved, all 0s | - +[[!table data=""" +31:30 | 29:28 | 27:22 | 21 | 20:19 | 18:16 | comment | +0b00 | SubVL | imm[5:0] |rsvd| rd[4:0] || sv.setvl rd, x0, imm | +0b01 | SubVL | imm[5:0] | rs1[2:0] || rd[2:0] | RVC reg format, sv.setvl rd, rs, imm | +0b10 | SubVL | imm[5:0] |rsvd| rs1[4:0] || sv.setvl x0, rs1, imm | +0b11 | rsvd | rsvd |rsvd| rsvd || reserved, all 0s | +"""]] When 16xil is 0b111, this is the "Extended" Format, using the >= 192-bit RISC-V ISA format. Note that the length is 96+16\*nnnnn, not 192+