From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Tue, 6 Nov 2018 11:35:42 +0000 (+0000)
Subject: convert rv_sl to same extra bitwidth arg
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=73c090d0ce0cbe4778fdc7f9b6ad389445092f0f;p=riscv-isa-sim.git

convert rv_sl to same extra bitwidth arg
---

diff --git a/riscv/insns/sll.h b/riscv/insns/sll.h
index ec337b5..9042da7 100644
--- a/riscv/insns/sll.h
+++ b/riscv/insns/sll.h
@@ -1 +1 @@
-WRITE_RD(sext_xlen(rv_sl(RS1, rv_and(RS2, sv_reg_t(xlen-1)))));
+WRITE_RD(sext_xlen(rv_sl(RS1, RS2, xlen)));
diff --git a/riscv/sv_insn_redirect.cc b/riscv/sv_insn_redirect.cc
index 7b799f1..6475435 100644
--- a/riscv/sv_insn_redirect.cc
+++ b/riscv/sv_insn_redirect.cc
@@ -540,14 +540,20 @@ sv_reg_t sv_proc_t::rv_xor(sv_reg_t const & lhs, sv_reg_t const & rhs)
 }
 
 sv_reg_t sv_proc_t::rv_sl(sv_reg_t const & lhs, sv_reg_t const & rhs)
+{
+    return rv_sl(lhs, rhs, xlen);
+}
+
+sv_reg_t sv_proc_t::rv_sl(sv_reg_t const & lhs, sv_reg_t const & rhs,
+                          unsigned int dflt_bitwidth)
 {
     uint8_t bitwidth = _insn->src_bitwidth;
     uint64_t vlhs = 0;
     uint64_t vrhs = 0;
     if (rv_int_op_prepare(lhs, rhs, vlhs, vrhs, bitwidth)) {
-        return lhs << rhs;
+        return lhs << rv_and(rhs, sv_reg_t(dflt_bitwidth-1U));
     }
-    uint64_t result = vlhs << vrhs;
+    uint64_t result = vlhs << (vrhs & (bitwidth-1));
     return rv_int_op_finish(lhs, rhs, result, bitwidth);
 }
 
diff --git a/riscv/sv_insn_redirect.h b/riscv/sv_insn_redirect.h
index a39ba85..82100c5 100644
--- a/riscv/sv_insn_redirect.h
+++ b/riscv/sv_insn_redirect.h
@@ -134,6 +134,8 @@ public:
     sv_reg_t rv_or(sv_reg_t const & lhs, sv_reg_t const & rhs);
     sv_reg_t rv_xor(sv_reg_t const & lhs, sv_reg_t const & rhs);
     sv_reg_t rv_sl(sv_reg_t const & lhs, sv_reg_t const & rhs);
+    sv_reg_t rv_sl(sv_reg_t const & lhs, sv_reg_t const & rhs,
+                   unsigned int dflt_bitwidth);
     sv_reg_t rv_sr(sv_reg_t const & lhs, sv_reg_t const & rhs);
     sv_reg_t rv_sr(sv_reg_t const & lhs, sv_reg_t const & rhs,
                    unsigned int dflt_bitwidth);