From: Jan Beulich <jbeulich@suse.com>
Date: Mon, 8 Jun 2020 06:40:22 +0000 (+0200)
Subject: x86: simplify check_byte_reg()
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=73c76375955890df396b4f78dee0fa6a52af6c5f;p=binutils-gdb.git

x86: simplify check_byte_reg()

With the introduction of what right now is the very first conditional
in the function's loop (commit dc821c5f9ae5 ["x86: replace Reg8, Reg16,
Reg32, and Reg64"]), the last if() in the same loop has become
pointless - retain just its body.
---

diff --git a/gas/ChangeLog b/gas/ChangeLog
index d40008148d2..27ffa3c52b8 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2020-06-08  Jan Beulich  <jbeulich@suse.com>
+
+	* config/tc-i386.c (check_byte_reg): Drop dead conditional
+	around as_bad().
+
 2020-06-08  Jan Beulich  <jbeulich@suse.com>
 
 	* config/tc-i386.c (check_register): Split RegTR handling, to
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index cfb3b992cd8..e0ebf80d8aa 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -7132,21 +7132,10 @@ check_byte_reg (void)
 	continue;
 
       /* Any other register is bad.  */
-      if (i.types[op].bitfield.class == Reg
-	  || i.types[op].bitfield.class == RegMMX
-	  || i.types[op].bitfield.class == RegSIMD
-	  || i.types[op].bitfield.class == SReg
-	  || i.types[op].bitfield.class == RegCR
-	  || i.types[op].bitfield.class == RegDR
-	  || i.types[op].bitfield.class == RegTR)
-	{
-	  as_bad (_("`%s%s' not allowed with `%s%c'"),
-		  register_prefix,
-		  i.op[op].regs->reg_name,
-		  i.tm.name,
-		  i.suffix);
-	  return 0;
-	}
+      as_bad (_("`%s%s' not allowed with `%s%c'"),
+	      register_prefix, i.op[op].regs->reg_name,
+	      i.tm.name, i.suffix);
+      return 0;
     }
   return 1;
 }