From: Francisco Jerez Date: Tue, 26 Apr 2016 01:06:13 +0000 (-0700) Subject: intel/fs: Rework INTERPOLATE_AT_PER_SLOT_OFFSET X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=73d60455e90e14ef8618bfd09b0b4f54e1d58b48;p=mesa.git intel/fs: Rework INTERPOLATE_AT_PER_SLOT_OFFSET This reworks INTERPOLATE_AT_PER_SLOT_OFFSET to work more like an ALU operation and less like a send. This is less code over-all and, as a side-effect, it now properly handles execution groups and lowering so SIMD32 support just falls out. Reviewed-by: Jason Ekstrand Reviewed-by: Matt Turner --- diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index 07be2e3da42..84becb3d4b4 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -805,6 +805,8 @@ fs_inst::components_read(unsigned i) const else return 1; } + case FS_OPCODE_INTERPOLATE_AT_PER_SLOT_OFFSET: + return (i == 0 ? 2 : 1); default: return 1; @@ -840,7 +842,6 @@ fs_inst::size_read(int arg) const case SHADER_OPCODE_TYPED_SURFACE_WRITE: case FS_OPCODE_INTERPOLATE_AT_SAMPLE: case FS_OPCODE_INTERPOLATE_AT_SHARED_OFFSET: - case FS_OPCODE_INTERPOLATE_AT_PER_SLOT_OFFSET: case SHADER_OPCODE_BYTE_SCATTERED_WRITE: case SHADER_OPCODE_BYTE_SCATTERED_READ: if (arg == 0) diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp index a01d32000b2..c352f87c16e 100644 --- a/src/intel/compiler/brw_fs_generator.cpp +++ b/src/intel/compiler/brw_fs_generator.cpp @@ -1579,16 +1579,18 @@ fs_generator::generate_pixel_interpolator_query(fs_inst *inst, struct brw_reg msg_data, unsigned msg_type) { - assert(inst->size_written % REG_SIZE == 0); + const bool has_payload = inst->src[0].file != BAD_FILE; assert(msg_data.type == BRW_REGISTER_TYPE_UD); + assert(inst->size_written % REG_SIZE == 0); brw_pixel_interpolator_query(p, retype(dst, BRW_REGISTER_TYPE_UW), - src, + /* If we don't have a payload, what we send doesn't matter */ + has_payload ? src : brw_vec8_grf(0, 0), inst->pi_noperspective, msg_type, msg_data, - inst->mlen, + has_payload ? 2 * inst->exec_size / 8 : 1, inst->size_written / REG_SIZE); } diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index 7ee68debad2..b881975905e 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -1795,21 +1795,8 @@ emit_pixel_interpolater_send(const fs_builder &bld, { struct brw_wm_prog_data *wm_prog_data = brw_wm_prog_data(bld.shader->stage_prog_data); - fs_inst *inst; - fs_reg payload; - int mlen; - if (src.file == BAD_FILE) { - /* Dummy payload */ - payload = bld.vgrf(BRW_REGISTER_TYPE_F, 1); - mlen = 1; - } else { - payload = src; - mlen = 2 * bld.dispatch_width() / 8; - } - - inst = bld.emit(opcode, dst, payload, desc); - inst->mlen = mlen; + fs_inst *inst = bld.emit(opcode, dst, src, desc); /* 2 floats per slot returned */ inst->size_written = 2 * dst.component_size(inst->exec_size); inst->pi_noperspective = interpolation == INTERP_MODE_NOPERSPECTIVE; @@ -3464,7 +3451,7 @@ fs_visitor::nir_emit_fs_intrinsic(const fs_builder &bld, FS_OPCODE_INTERPOLATE_AT_SAMPLE, dest, fs_reg(), /* src */ - msg_data, + component(msg_data, 0), interpolation); set_predicate(BRW_PREDICATE_NORMAL, inst);